Satyam Jain — Product Engineer

VLSI Emulation(pre silicon validation) Engineer. -> Experience on post silicon validation for 22 and 28NM chip. -> Experience on support the build and verification of Emulation Models targeting zebu. -> experience on debugging tcl testcases for veloce strato. -> Experience on creating test for verification of Emu models using python. -> Experience on mimicking the test from simulation environment (.sv) for Emulation (in .py). -> Experience on verification of subsystem IP with the help of logs, trackers and waves. -> Having experience of running regression. -> Makefile. Tools:- Verdi, Ncsim, GVIM Editor. Languages:- Verilog, System Verilog and Python. Skills- Unix commands,

Stackforce AI infers this person is a VLSI Emulation Engineer with expertise in post silicon validation and functional verification.

Location: Bengaluru, Karnataka, India

Experience: 5 yrs 3 mos