Gopika S

Software Engineer

Bengaluru, Karnataka, India12 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in pre-silicon validation on Cadence Palladium platforms.
  • Proficient in functional test development using C and C++.
  • Strong experience in silicon bring-up and validation of SOC blocks.
Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in pre-silicon and post-silicon processes.

Contact

Skills

Core Skills

EmulationValidationVerificationTesting

Other Skills

Design VerificationPre silicon ValidationPost silicon ValidationTestplansTestcasesRegression SetupCoverage AnalysisPalladiumMatlabVerilogSignal ProcessingSimulationsICLaTeXMicrosoft Office

About

Emulation engineer with good experience in prototyping of design+TB for cpu and soc. Good experience in Emulation based pre silicon validation on Cadence Palladium platforms. Functional test developments in high level languages like C,c++ Good experience in silicon bringup to complete functional validation of CRMU, DMA, Trustzone,Arm cores, and other SOC blocks. PVT Validation of different process corners. Performance Evaluation of SOC

Experience

12 yrs 10 mos
Total Experience
3 yrs 6 mos
Average Tenure
5 yrs 2 mos
Current Experience

Qualcomm

2 roles

Senior Staff Engineer

Promoted

Dec 2024Present · 1 yr 5 mos

Staff Engineer

Mar 2021Dec 2024 · 3 yrs 9 mos

Nuvia inc

Member Of Technical Staff

Oct 2020Mar 2021 · 5 mos

Illinois institute of technology

Graduate Student

Aug 2015Jan 2017 · 1 yr 5 mos

Broadcom

2 roles

Engineer - IC design

Promoted

Jul 2013Oct 2020 · 7 yrs 3 mos

  • Design Verification, Emulation, Pres silicon and post silicon Validation
Design VerificationEmulationPre silicon ValidationPost silicon ValidationValidation

Engineer IC Design

Jul 2013Jul 2014 · 1 yr

  • Worked with the Modem SOC verification team on 4G LTE thin modem SOCs.
  • 1) I was the block owner of MPHY in SOC and holds the complete responsibility for the block level and top level verification of MPHY in unitary test mode. I was also involved with the functional verification of RFBB interface involving data and control transmission between modem and RFIC model in testbench via MPHY in the SOC.
  • 2) I have experience in developing testplans and testcases for verification and also in setting up regressions and performing coverage analysis.
  • 3) I also have experience with the block level testing on Palladium and HAPS.
VerificationTestplansTestcasesRegression SetupCoverage AnalysisTesting

Iist

Intern

May 2012Jun 2012 · 1 mo · Trivandrum

  • Application of complex lead compensator for laser guided missile

Vikram sarabhai space centre,isro,trivandrum

Industrial familiarization

May 2011May 2011 · 0 mo · Trivandrum

  • Software project on Waveform Generator to study system response using visual C++( May 2011- two weeks)

Education

Illinois Institute of Technology

Master of Science - MS — Computers and Microelectronics

Jan 2015Jan 2017

National Institute of Technology Calicut

Bachelor of Technology (B.Tech.) — Electronics and Communication Engineering

Jan 2009Jan 2013

Arya Central School

High school and Higher Secondary

Jan 2003Jan 2009

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