Sahil Chawla — Operations Associate
Sahil is a senior C++ engineer with end-to-end experience building trading systems across China, UK, and Indian markets. He has a strong background in event-driven engines for market data, order entry, risk, and simulations. At Mathisys, he has developed expertise in designing low-latency software using advanced concurrency primitives, kernel-bypass and hardware-assisted networking, IPC, and rigorous micro-bench-marking and profiling. Prior to this, he worked at Qualcomm developing software reference models for next-generation Wi-Fi chip-sets.
Stackforce AI infers this person is a Fintech expert with strong expertise in low-latency systems and wireless technologies.
Location: Gurugram, Haryana, India
Experience: 9 yrs 6 mos
Skills
- Low Latency
- High-frequency Trading
- C++
- Algorithms
- Wireless Technologies
- Python
Career Highlights
- Expert in low-latency trading systems development.
- Strong background in event-driven engines for market data.
- Proven track record in optimizing performance for high-frequency trading.
Work Experience
Mathisys Advisors
Infrastructure Specialist (3 yrs 2 mos)
Qualcomm
Senior Engineer (1 yr 2 mos)
Engineer (2 yrs 3 mos)
Indian Institute of Technology, Bombay
Teaching Assistant (9 mos)
Annual InSync Dance Showcase - Overall Coordinator (11 mos)
Student Mentor (2 yrs)
Visible Light Communication Link (using LEDs) (3 mos)
Microprocessor Design and Testing (1 mo)
Teaching Assistant (11 mos)
Undergraduate Research Assistant (2 mos)
Inter IIT Cultural Meet
Dance Captain (1 yr 7 mos)
Qualcomm
Summer Internship (2 mos)
Education
Master of Technology - MTech + Bachelor of Technology - BTech at Indian Institute of Technology, Bombay
Senior Secondary at R.S.D. Raj Rattan Public School
Matriculation at St. Joseph's Convent School