S

Surendra Pal Singh

Product Manager

Noida, Uttar Pradesh, India14 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 14+ years of experience in software architecture.
  • Boosted product performance by over 50%.
  • Proficient in Generative AI tools and applications.
Stackforce AI infers this person is a Software Engineering Architect with expertise in high-performance systems and optimization.

Contact

Skills

Core Skills

ArchitectureOptimizationSoftware DevelopmentUi/ux DesignWeb Development

Other Skills

Activity PreservationAlgorithmsAmazon Web Services (AWS)C++Cascading Style Sheets (CSS)CollaborationDC Map ParsingDOSData StructuresDebuggingDesignDesign PatternsDesigning DC map parserDevelopmentEnhancing saif map flow

About

A visionary Engineering Architect and R&D Leader with 14+ years of experience building and scaling high-performance software for industry giants. My work focuses on architecting solutions, driving strategic initiatives, leading complex projects from concept to delivery and optimizing core technology to deliver measurable business results. I have a proven track record of boosting product performance by over 50%, enabling critical partnerships with clients like Intel and Apple, and earning top awards for innovation. I am committed to continuous learning and proactively embrace new technologies to stay at the cutting edge of innovation. I recently enhanced my skillset with Generative AI tools, demonstrating my commitment to staying at the forefront of technology. Technical skill set: • Architecture & Design: Design Patterns (SOLID, Observer to name a few) and efficient data structures. • Professional Certification: Completed 16-hour workshop on Generative AI applications and workflows covering tools like ChatGPT, Gemini and Claude etc. • Languages: C/C++, Python, Shell Scripting, Perl, Java. • Databases & Web: MySQL, SQL, Node.js, JavaScript, HTML, CSS. • Tools: Linux, Git, Perforce, GDB, Valgrind, Coverity, Visual Studio, Qt Creator, Xcode, Android Studio. • Cloud Technologies: Basics of AWS, Azure. Email ID: surendrapalsingh1410@gmail.com Phone no: +91 9582487066

Experience

Synopsys inc

3 roles

Senior Staff R&D Engineer

Jan 2024Present · 2 yrs 2 mos

Senior R&D Engineer II

Promoted

Dec 2020Present · 5 yrs 3 mos

  • I am responsible for design, development, optimization and debugging of Fusion Compiler’s Power Analysis segment. My core responsibilities include participating/leading design and architecture reviews, designing new features/flows, performance optimizations and debugging complex, high priority issues by our customers (including but not limited to Facebook, Apple, Samsung, Microsoft, Intel, AMD and MediaTek etc.).
  • Also, I am actively involved in recruiting and mentoring Engineers for their growth and to build a high performing team.
  • Fusion Compiler (FC) U-2022.12: Cycle/Time based power analysis by parsing FSDB file:
  • Collaborating with teams across different continents and influencing architectural decisions using technical and functional expertise.
  • Using NPI API’s, I am responsible for end-end design and development starting from reading FSDB file, getting value changes for an object and using these value changes for propagation.
  • Key challenge was to design a memory and runtime efficient engine as uncompressed FSDB files are huge in size.
  • Fusion Compiler T-2022.03:
  • Saif_map block support: Incorporated observer design pattern to catch notification for commit_block and craft out saif_map for newly committed block from original saif_map.
  • Run time optimizations (eg. optimized runtime for '-saif_file' option by >65% (from 10 hours to 3.5 hours).
  • Fusion Compiler S-2021.06:
  • Improving power accuracy by preserving activities on hierarchical ports: Pitched the idea to preserve activities on hier ports during optimizations. Designed and implemented full flow independently and within timelines. Received well by customers.
  • Building a robust saif map solution: Several notable enhancements include identifying third party netlist changes (MediaTek), identifying the stage of 'saif_map -start' (Google), adding fallbacks for PTPX mappings (Samsung), smart algorithm to detect the best RTL mapping (Microsoft).
DesignDevelopmentOptimizationDebuggingArchitectureCollaboration+1

Senior R&D Engineer I

Jun 2018Dec 2020 · 2 yrs 6 mos

  • Fusion Compiler R-2020.09:
  • Activity preservation in FC and PrimePower: Implemented activity observer support (based on observer design pattern) across modules for this. Debugging such issues required examining very large log files (80-100 GB plain text file) to locate point of activity loss. Eg. incorporating inhTermMap to give correct notification for polarity change (Qualcomm, AMD).
  • Fusion Compiler Q-2019.12:
  • Enhancing saif map flow: One of the highest severities and highly visible feature tracked by many customers. Some prominent enhancement are removing elaborated objects from saif_map tracking; adding new options like -essential, -status, -debug (Samsung SARC), removing duplicate entries from both gate and rtl side, top level ports being inverted, enhancing/adding Inversion push functionality (ARM), enabling direction awareness in support in saif map.
  • Fusion Compiler P-2019.03:
  • Designing DC map parser: Parse mapping file provided by Design Compiler (DC) and append this information to existing saif map information already available in FC.
  • Ownership Coverity issues and memory leak/corruption issues (investigated using Valgrind & Intel Inspector).
Activity PreservationDebuggingEnhancing saif map flowDesigning DC map parserArchitectureOptimization

Adobe systems

Software Engineer

Jul 2011Jun 2018 · 6 yrs 11 mos · Noida Area, India

  • At Adobe, I am involved with design, development and improvement for Adobe Photoshop Elements Organizer. It is a C++/Qt based media organizing application. Following is summary of work done on various releases of Photoshop Elements Organizer.
  • Photoshop Elements Organizer 2018:
  • Search Revamp
  • Done UI reskinning of some visually outdated workflows in application.
  • Got CC India Promising Innovator 2016 and CC India Ideator 2016 award for prototyping and presenting Image Curation technology at Creative Cloud Innovation Month 2016.
  • Photoshop Elements Organizer 15:
  • Gesture Support (Pinch and zoom, swipe and rotate).
  • Synchronize catalog.
  • Photoshop Elements Organizer 14:
  • Place Caching:.
  • Showing dates in European Date format (YYYY/MM/DD).
  • Photoshop Elements Organizer 13:
  • Alphabetical Sorting.
  • Advanced Search.
  • Looked the whole automation effort for Elements Organizer.
  • Adobe Revel Client on Android:
  • Developed features from scratch, bug fixing.
  • Got Special Contribution Award for integrating Omniture library.
  • ElementsCX:
  • It is a web portal which shows the health of the product. I am involved in end to end design, development, testing, periodic data update, maintenance of Elements internal web portal comprising of user statistics, internal reports and development statistics in the form of dynamic tables, graphs etc. using WAMP stack and JavaScript libraries.
  • Android Application - Citizen Connect:
  • Bitbucket URL: https://bitbucket.org/surendra14/androidprogramming
DesignDevelopmentUI ReskinningFeature DevelopmentSoftware DevelopmentUI/UX Design

Ericsson

Summer Internship

Jun 2010Aug 2010 · 2 mos · Gurgaon, India

  • At Ericsson, I got the opportunity to learn:
  • GSM Evolution/Generations of Mobile Communication.
  • GSM/GPRS architecture including functions of indivdual components like Base Transreceiver system, Base Station Controller, Transcoder Controller, Mobile Switching Centre.
  • Cell Planning.
  • Besides above I got to work on Fault Management Layer of Network Management System. At the fault management level, network problems are found and corrected. Potential future problems are identified and steps are taken to prevent them from occurring or recurring. With fault management, the network stays operational, and downtime is minimized.

Hindustan aeronautics limited

Summer Intern

Jun 2009Jul 2009 · 1 mo · Lucknow Area, India

  • During my internship at HAL, I got to know about:
  • Divisions and core business of HAL.
  • Products and Services offering of HAL.
  • Aircraft basics.

Education

Institute of Engineering and Technology , Lucknow

Bachelor of Technology (B.Tech.) — Electronics and communication Engineering

Jan 2007Jan 2011

Assisi Convent Senior Secondary School , Etah

Intermediate — PCM with Computer

Jan 2005Jan 2006

Assisi Convent Senior Secondary School, Etah

Class X

Jan 2003Jan 2004

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