Jitendra Prakash Shukla

CEO

Bengaluru, Karnataka, India22 yrs experience
Highly Stable

Key Highlights

  • Expert in EDA and simulation optimization.
  • Proven track record in runtime and clock optimization.
  • Strong background in VLSI and embedded systems.
Stackforce AI infers this person is a highly skilled EDA engineer specializing in simulation and optimization.

Contact

Skills

Core Skills

SimulationOptimizationRuntime OptimizationMulticore Support

Other Skills

AlgorithmsCC++Clock OptimizationCompilersCustomer design analysisDC runtime optimizationData StructuresDebuggingEDAElaborationGlobal Analysis Simulation OptimizationLinuxParallel SimulationPerl

Experience

Siemens eda (siemens digital industries software)

2 roles

Architect

Promoted

Jan 2025Present · 1 yr 2 mos · Bengaluru, Karnataka, India

Principal Engineer

Jan 2022Jan 2025 · 3 yrs · Bengaluru, Karnataka, India

Mentor graphics

Lead Member Consulting Staff

Mar 2017Jan 2022 · 4 yrs 10 mos · Bengaluru Area, India

  • Part of NextGen Questa sim product team, and have worked on following areas -
  • 1) Elaboration - Was part of next gen elaboration and worked on bind elaboration, Inlining, frontier elaboration and design dumping projects.
  • 2) Global Analysis Simulation Optimization - Delivered clock optimization when clock generator and consumer are not in same generational variants. Clock, gated clock optimization successfully delivered.
  • 3) Parallel Simulation - Part of parallel simulation team and involved in auto partition analysis, cross partition analysis and optimization using global analysis.
ElaborationGlobal Analysis Simulation OptimizationParallel SimulationSimulationOptimization

Synopsys inc

2 roles

R & D Engineer, Sr 2 in Design Compiler Optimization Team

Jun 2016Mar 2017 · 9 mos

  • Was involved with -
  • DC runtime optimization - Implemented analytics based algorithm to optimize the runtime of placement aware timing optimization engine. Also worked for runtime improvement of area optimization engines.
  • Multicore support for Design compiler - Was supporting and adding features for various multicore engine in DC. Was involved in fixing various multicore non-deterministic issues, and had cleaned almost all known issues.
  • Analyzing Various high runtime customer designs helping them to decrease the runtime upto 4x.
  • Fixing and supporting various high priority customer issues in various engines.
DC runtime optimizationMulticore supportCustomer design analysisRuntime OptimizationMulticore Support

R&D Engineer, Sr 1

Feb 2013Jun 2016 · 3 yrs 4 mos

Mentor graphics

LMTS

Jan 2013Feb 2013 · 1 mo · Bangalore

Axiom design automation

2 roles

Project Lead

Jan 2011Dec 2012 · 1 yr 11 mos · Bangalore

Software/Sr software Engineer

Jan 2006Dec 2010 · 4 yrs 11 mos · Bangalore

Iiit hyderabad

Student to him

Jan 2004Jan 2006 · 2 yrs

  • Pursued M. Tech (VLSI & Embedded Systems)

Education

IIIT Hyderabad

M.Tech — VLSI & Embedded System

Jan 2004Jan 2006

National Institute of Technology Raipur

Bachelor's degree

Jan 1999Jan 2003

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