Harihara S Dutt Bhogadi

AI Researcher

San Francisco, California, United States9 yrs 1 mo experience
Highly Stable

Key Highlights

  • Expert in Performance Modeling and Workload Analysis.
  • Proven track record in AI/ML performance architecture.
  • Strong background in Computer Architecture and GPU performance.
Stackforce AI infers this person is a specialist in AI/ML and Computer Architecture with a focus on performance optimization.

Contact

bhsdutt@gmail.comLinkedIn

Skills

Core Skills

Performance ModelingWorkload AnalysisComputer ArchitectureHealthcare Technology

Other Skills

Bluetooth CommunicationCC++CUDADFD FeaturesDeep LearningDigital Circuit DesignHTMLMatlabMemory Controller DesignMicrocontroller ProgrammingModelSimPerlRTL DesignSynopsys tools

About

Machine Learning, Computer Architecture, Performance Modeling, Workload analysis

Experience

Google

Multimedia Machine Learning Architect

Dec 2024 – Present · 1 yr 3 mos

Qualcomm

AI/ML Performance Architect

Oct 2022 – Dec 2024 · 2 yrs 2 mos · Santa Clara, California, United States

  • Inference Accelerator (Cloud AI100) Performance Architecture - Architecture feature evaluation, Performance Modeling, Workload Analysis
Performance ModelingWorkload Analysis

Samsung sarc | acl

2 roles

Senior Engineer - GPU Performance Architecture

Promoted

Feb 2020 – Oct 2022 · 2 yrs 8 mos · San Francisco Bay Area

Engineer - GPU Performance Architecture

Jul 2017 – Feb 2020 · 2 yrs 7 mos · San Francisco Bay Area

Microsoft

Performance Architecture Intern - DL Accelerator

Jun 2016 – Aug 2016 · 2 mos · Greater Seattle Area

  • Performance Modelling - Deep Learning Hardware Accelerator

North carolina state university

3D DRAM Memory Controller Design

Jan 2016 – Jun 2016 · 5 mos · Raleigh-Durham, North Carolina Area

  • Developed an efficient pipelined Memory Controller design in RTL for a 64 port Tezzaron DiRAM memory, following DSDR Interface protocol with effective scheduling policy of page, cache operation commands to satisfy multiple timing constraints and to extract parallelism across multiple banks in a single port

Nvidia

ASIC Intern

Aug 2014 – Dec 2014 · 4 mos · Bengaluru Area, India

  • As an Intern in the Denver CPU team, I have worked on implementing DFD features for the core complex
  • Co-Developed non-legacy test cases using in-house Random Instruction Generator tool for testing CPU DFD features and interfaces at a SoC level.
  • Gained valuable knowledge of Denver Architecture, ARM Coresight features and other DFD related blocks/mechanisms in the Tegra Core Complex
  • Provided Infra support by porting and maintaining perl scripts for automation of metrics collection, script level changes for simultaneous generation and execution of elf files

Central electronics engineering research institute

Research Intern

May 2013 – Jun 2013 · 1 mo · Chennai Area, India

  • Development of Portable Health-Care Watch
  • Under the guidance of Senior Scientist Dr. Bala Pesala,
  • Designed and Implemented a Portable Healthcare Device in the form of a watch that measures body temperature and Heart Rate and sends them through Bluetooth to a nearby Android Phone.
  • Coded the Microcontroller Arduino PRO MINI to measure the parameters with the help of a couple of sensors and used a Bluetooth module BTBee to form the communication link between the Watch and the phone.
  • Optimized the product for long range applications using a GSM module

Education

North Carolina State University

Master's degree — Computer Engineering

Jan 2015 – Jan 2017

Birla Institute of Technology and Science, Pilani

Bachelor of Engineering (B.E.)

Jan 2011 – Jan 2015

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