Yeshwanth R.

Software Engineer

Bengaluru, Karnataka, India6 yrs 7 mos experience
Highly Stable

Key Highlights

  • Led validation efforts for next-gen Client SoCs.
  • Increased PCIe test coverage by 35% through automation.
  • Delivered healthcare IoT devices with high detection accuracy.
Stackforce AI infers this person is a Validation Engineer specializing in SoC and IoT device development.

Contact

Skills

Core Skills

Soc Functional ValidationClient Socs ValidationPlatform Soc ValidationServer Processors ValidationPost-silicon ValidationPlatform ValidationIot Device DevelopmentFirmware Validation

Other Skills

20/20 DesignAccelerated TestingAcceleratorArduinoAutomationBig Data AnalyticsCC++Client-Server ModelCloud ComputingCommunication ProtocolsComputer System ValidationDigital CommunicationEagle PCBEmbedded C

About

I am an experienced Platform & SoC Validation Engineer with over 5 years of expertise spanning Client and Server Platform Validation, SoC functional validation, and post-silicon validation. My work has consistently focused on ensuring performance, reliability, and scalability across cutting-edge processor platforms. Strong quality assurance professional with a Master Of Technology in Digital Communication from RV College of engineering and Bachelor of Engineering focused in Electronic and Communications Engineering from VTU. At Intel Technology India, I’ve led validation efforts across multiple domains-PCIe (Gen1-Gen5), RAS, BMC, SST/DPMO, virtualization, accelerators, and power management-enabling seamless bring-up, triage, and optimization of both Client SoCs and Xeon Server processors. I take pride in driving measurable impact, such as: Increasing PCIe test coverage by 35% and improving bug catch rate by 20% through automation. Delivering real-world enterprise validation frameworks with >95% scenario match rate. Reducing platform bring-up time by 3 weeks through effective cross-team collaboration. Ensuring less than 2% PRQ bug rate in mission-critical accelerator validation. My technical toolkit spans Python, C, Bash scripting, and strong hands-on expertise with Linux, BIOS, board-level debugging, and validation tools such as Jenkins, Git, Jira, and GIO. Beyond validation, I have contributed to IoT healthcare device prototyping, showcasing my ability to adapt skills across industries. I am passionate about system validation, hardware-software co-optimization, and scalable test automation frameworks, and I thrive in cross-functional environments where innovation meets execution. I look forward to connecting with professionals and organizations working on next-gen computing platforms, SoCs, and system validation..

Experience

Lyptus technologies

Senior Engineer

Sep 2025Present · 6 mos · Bengaluru, Karnataka, India · On-site

  • Working as a Senior Engineer in the Embedded Group with Client at Client Location for Embedded , Semiconductor and Automotive projects .
  • As a part of Semiconductor group , i have been handing complex Execution and Debug scenarios for Advanced Micro Devices in the Areas RAS , PCIE and SST

Intel corporation

3 roles

SOC Functional Validation Engineer

Nov 2024Aug 2025 · 9 mos

  • Led PCIe (Gen1 ‑ Gen5) end‑to‑end functional and electrical validation for next‑gen Client SoCs (Series 3+), covering multi‑lane testing across graphics, storage, and networking subsystems.
  • Increased PCIe test coverage by 35% using automation and fault injection, improving pre‑silicon bug catch rate by 20% over prior generation.
  • Partnered with silicon, BIOS, and board teams to triage and resolve 20+ high‑priority issues, reducing platform bring‑up time by 3 weeks.
PCIeAutomationFault InjectionTriagePlatform Bring-upSoC Functional Validation+1

Platform SOC Validation Engineer

Oct 2021Nov 2024 · 3 yrs 1 mo

  • Drove validation of 4th/5th Gen Xeon Server Processors, focusing on RAS ‑ Injected EINJ and AER error cases to verify error logging, recovery, and SEL functionality.
  • SST & DPMO ‑ Validated power throttling, turbo behavior, and thermal sensor logic under load
  • Designed use‑case‑driven validation frameworks simulating real‑world enterprise workloads, enabling customer scenario match rate >95%
  • during field testing.
  • Delivered QAT® (QuickAssist Technology) accelerator validation in mission‑critical scenarios ensuring less than 2% post‑release (PRQ) bug rate for accelerator module.
  • Virtualization ‑ Qualified hardware‑assisted VM isolation and Intel® VT‑X performance.
Xeon Server ProcessorsValidation FrameworksError LoggingPower ThrottlingTurbo BehaviorPlatform SoC Validation+1

Post Graduate Technical Intern

Feb 2021Oct 2021 · 8 mos

  • Enabled full server platform bring‑up for Xeon validation.
  • Automated and optimised the process for Validation, working with CentOS and RHEL, shell scripting, and employed other Linux tools.
  • Debugged 10+ critical hardware failures across BMC and RASmodules duringmilestone deliveries, earning recognition from engineering lead‑ership.
Server Platform Bring-upAutomationShell ScriptingLinux ToolsPost-Silicon ValidationPlatform Validation

Shg technologies

Intern

Feb 2020Feb 2021 · 1 yr · Bangalore Urban, Karnataka, India

Shg technologies india pvt. ltd.

Graduate Technical Intern

Jan 2020Jan 2021 · 1 yr

  • Spearheaded design, development and production of industry‑compliant healthcare IoT devices, Personal COVID Kit (PCC)
  • Delivered MVP prototypes within 4 months, enabling first clinical PoC trials with 90%+ detection accuracy.
  • Significantly boosted the Prototype’s accuracy by 30%, which was yielding an accuracy of 50‑60% .
  • Designed and developed industry‑compliant healthcare IoT device, Vein Finder.
Healthcare IoT DevicesPrototype DevelopmentIoT Device Development

Ust global

Validation Engineer

Jan 2019Nov 2019 · 10 mos · Bengaluru Area, India · On-site

Ust global technology india services pvt. ltd.

Validation Engineer

Jan 2019Nov 2019 · 10 mos

  • Validated Embedded Controller (EC) firmware which is responsible for power, ports and communication within the board for Intel® client platforms.
  • Focused on power and inter‑chip protocol communication, optimizing thermal response logic and reducing functional test failures.

Sandeepani- school of embedded system design

Embedded System trainee

Aug 2018Feb 2019 · 6 mos · Bengaluru, Karnataka, India

Embedded Controller FirmwarePower OptimizationFirmware Validation

Expertshub industry skill development centre

Intern

Jan 2017Feb 2017 · 1 mo · Bengaluru, Karnataka, India

I-medita learning solutions pvt. ltd.

intern

Jun 2016Jul 2016 · 1 mo · bangalore

Education

RV College Of Engineering

Master of Technology — Digital communication and engineering

Nov 2019Nov 2021

RV College Of Engineering

Master of Technology - MTech — Digital Communication

Jan 2019Jan 2021

Visvesvaraya Technological University

Bachelor of Technology - BTech

Jun 2014Jun 2018

M V J College of Engineering, BANGALORE

Bachelor of Engineering

Jan 2014Jan 2018

ITI CENTRAL SCHOOL