sanjugouda Patil

Software Engineer

Karnataka, India1 yr 8 mos experience

Key Highlights

Expert in power reduction techniques for CMOS circuits.
Proficient in digital circuit design and semiconductor engineering.
Hands-on experience with Ngspice for circuit analysis.

Stackforce AI infers this person is a Semiconductor Engineering professional with expertise in digital circuit design and power reduction techniques.

Contact

Skills

Core Skills

Semiconductor EngineeringDigital Circuit Design

Other Skills

Power Reduction TechniquesCMOS-based CircuitsNgspiceLeakage Power ReductionControl-gate TechniqueDelay Analysismips 32 configurationIntel 8085Operating SystemsField-Programmable Gate Arrays (FPGA)PipelinesStatic Timing AnalysisModelSimEda playgroundKeil uVision

Experience

Arm

Hardware Engineer

Jul 2024 – Present · 1 yr 8 mos · Bengaluru, Karnataka, India

National institute of technology karnataka

Research Internship

May 2023 – Jul 2023 · 2 mos · Surathkal · Remote

Power Reduction Techniques in CMOS-based Circuits.
Implemented the LECTOR technique for leakage power reduction and Control-gate technique for short circuit power reduction. Verified the power reduction with the inverter, inverter chain (length 3 and 5 ), 2 input NAND gate, and 2-bit comparator.
Ngspice open source simulator is used for power and delay analysis and the netlist of Ngspice is extracted from the layout.

Power Reduction TechniquesCMOS-based CircuitsNgspiceLeakage Power ReductionControl-gate TechniqueDelay Analysis+2