Amit Prakash — Director of Engineering
o NoC/Interconnect Architecture, uArchitecture, design, performance modelling and analyses o Low Power Design, dynamic power analyses and optimization, clock tree power optimization and analyses, static power modelling, wire delay modelling o Fabric/NoC Design verification, Coherent High Speed Interconnect, Dram Controller and sub-system verification o Post silicon validation experience with sharp debug skills therein o Proficient in verilog, system verilog and Object Oriented Programming o Very result oriented with high quality control Specialties: o Proficient in VCS, Modelsim, C++, Python, Matlab, Spice o Mentor engineers in Interconnect, DDR, I/O Analog mixed Signal technical areas
Stackforce AI infers this person is a Semiconductor Design Expert with a focus on low power and high-performance architectures.
Location: Bengaluru, Karnataka, India
Experience: 19 yrs 5 mos
Skills
- Architecture
- Analog Circuit Design
Career Highlights
- Expert in NoC and interconnect architecture.
- Proficient in low power design and optimization.
- Strong background in post-silicon validation and debugging.
Work Experience
Qualcomm
Director of Engineering (11 yrs 1 mo)
Apple
ASIC Design Engineer (2 yrs 3 mos)
AMD
Sr Design Engineer (10 mos)
Sr. Product Development Engineer (3 yrs 11 mos)
Carnegie Mellon University
Graduate Research Assistant (1 yr 3 mos)
Ittiam Systems Pvt Ltd
Summer Internship (1 mo)
Education
MS at Carnegie Mellon University
B.Tech at Indian Institute of Technology, Kharagpur
12th Standard at Sainik School Tiliaya