Ashish Patni

DevOps Engineer

Noida, Uttar Pradesh, India29 yrs 2 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in Analog and RF circuit design.
Led technical training for global customers.
Contributed to Cadence Cloud Burst Solution.

Stackforce AI infers this person is a Telecommunications expert with a strong focus on RF and Analog design.

Contact

Skills

Core Skills

Applications EngineeringTeam ManagementAnalogRf DesignSoftware Development

Other Skills

Analog DesignCircuit Design3D EM SimulationData AnalysisEDAMixed SignalICSimulationsVerilogVLSISoCSemiconductorsTCLASICSignal Integrity

About

- Supporting customers and application engineers worldwide with the expertise in Virtuoso Custom IC Analog, Mixed Signal & RF Simulation Software, and Design Environment tools like ADE Explorer/Assembler/Verifier. - As a core team member, working on enabling Cadence Cloud Burst Solution with running EDA tools in Cloud. - Written App notes and Rapid Adoption Kits and presented Papers and Lectures at Technical Conferences - As a technical leader helped the team in understanding Product behavior and resolving issues. - Provide Product level technical training to customers. - Worked in Product Development & Validation/Characterization and Pre/Post Sales Activities.

Experience

Cadence design systems

4 roles

ASK AE Architect - Applications Engineering

Jul 2021 – Present · 4 yrs 8 mos

Team ManagementApplications Engineering

Sr. Principal Applications Engineer

Jul 2013 – Jun 2021 · 7 yrs 11 mos

Principal Application Engineer

Promoted

Jul 2007 – Jun 2013 · 5 yrs 11 mos

Lead Applications Engineer

Nov 2003 – Jun 2007 · 3 yrs 7 mos

Synad technologies, uk ( now part of st microelectronics)

Design Engineer

Jan 2001 – Jan 2003 · 2 yrs · Reading, United Kingdom

Designed Analog Antialias and Reconstruction filters (10 MHz bandwidth) and an AGC stage interfaced RFIC Transceiver and BBIC including.
Designed crystal oscillators at 40 MHz and 44 MHz
RF Mixer Characterization at 1.8GHz
Circuit Design for Characterization/Post Silicon Validation of RFIC transceiver & Mixed Signal Interface for MiniPCI Reference Design board used in Triple Mode Wireless LAN application.

Analog DesignRF DesignCircuit DesignAnalog

Comdev wireless, uk (subsidiary of comdev international)

Research Engineer

Jan 1999 – Jan 2001 · 2 yrs · Dunstable, Bedfordshire, UK

Designed and developed a RF band pass filter for GSM applications (900 MHz) using 3D EM Simulation tool – CST Microwave Studio & In House design tool.
Designed and developed low insertion loss, high rejection and asymmetric passband low pass filters. Design of Hybrid Coupler at 2.1 GHz for UMTS application.
Designed and developed RF Triplexer (900M/1800M/2100M) for UMTS Base Station Subsystem. These band pass filters were designed to have very low insertion loss, high rejection and low PIM values.
Worked on the design and implementation of CAT (Computer Aided Simulation, Analysis, Optimisation, Instrument Control & Data Acquisition and Tuning) Software written in C++ . This software was used for designing and tuning using both Frequency Domain (FD) and Time Domain (TD) tuning of RF filters and duplexers being made for mobile communications on production lines.

RF Design3D EM SimulationSoftware Development

Comdev phase group - iitk r&d cell, india (group company of comdev international)

Research Engineer

Jan 1996 – Jan 1999 · 3 yrs · Kanpur, U.P., India

Analysis of the End Effect Discontinuity of RF Coaxial Ceramic Resonators used in filters for cellular communications.
Developed a software stack library in HP VEE called Test Sequencing System (TSS) data file API library for AATE Software of the company.

Software DevelopmentData Analysis