Swapnil Tapadia — Design Manager
Experienced Senior Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, VHDL, IP/SoC Design, Field-Programmable Gate Arrays (FPGA), and Application-Specific Integrated Circuits (ASIC). Strong engineering professional with a Master of Technology (M.Tech.) focused in Microelectronics from Birla Institute of Technology and Science, Pilani.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and SoC development.
Location: Bengaluru, Karnataka, India
Experience: 14 yrs 9 mos
Skills
- Soc
- Asic
- Microcontrollers
- Rtl Design
Career Highlights
- Expert in ASIC and SoC design.
- Proven track record in microcontroller chip development.
- Strong background in FPGA and RTL design.
Work Experience
NVIDIA
Design Manager (2 yrs 10 mos)
Senior ASIC Engineer (6 yrs 6 mos)
Texas Instruments
Senior Design Engineer (3 yrs)
Design Engineer (2 yrs 7 mos)
Education
B.Tech at COEP Technological University
Master of Technology (M.Tech.) at Birla Institute of Technology and Science, Pilani
