Madhuri Nallapaneni — VP of Engineering

Accomplished leader with 22-23 years of experience in VLSI Industry. • DV expert in multilayered verification : MultiChip/MultiSocket/Chiplet, SOC, Subsytem, IP • Strong System Architecture understanding • Proven track record in building high quality DV teams • Recipient of AMD Award from CEO Next 5% Award 2017. Recipient of several GEO Business, GEO Excellence, VP Spotlight and Merit awards • Essayed mutliple technical and management leadership roles. • Strong experience in verification of complex x86-based SOCs in Server, GameConsole, Client, Chipsets, DiscreteGPUs • Coauthored Technical Papers, AATC Reviewer for 5+yrs. Represented in Global conferences • Experience across SOC/Subsystem/IP domains involving PCIe, USB, HighSpeedIO Controllers, Graphics, Multimedia, CPU, NorthBridge, SouthBridge, HT, ARM, AMBA, PowerManagement, PerformanceDV, Coherency, Multiengine • Proficient in building high quality SOC environments, DVmethodology and complete DV cycle understanding for signoff • Strong expertise in SimProfiling and DV environment performance improvement initiatives • Essayed WomensForumLead (AMD AWF Hyd Sitelead, Invecas) roles with a charter to upbring WomenLeadership and Networking • Delivered several Corporate level Trainings on various learning modules, CareerGuidance Sessions,Tech Talks in Universities and received high ratings across

Stackforce AI infers this person is a VLSI expert with strong leadership in verification and team building.

Experience: 23 yrs 6 mos