Sri Ram Gupta

Software Engineer

Plano, Texas, United States21 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Analog and Mixed Signal design.
  • Proven track record in leading complex imaging projects.
  • Strong background in low power and high precision designs.
Stackforce AI infers this person is a Semiconductor and Analog Design expert with a focus on Imaging and Biosensing technologies.

Contact

LinkedIn

Skills

Core Skills

Analog DesignAdcBiosensingPower ManagementAms DesignVerificationPllLow Power DesignI/o Design

Other Skills

Low Noise DesignVerilogAModellingImaging SoCsVCOBoost ConverterCurrent ConveyorsTranslinear CircuitsUSBSemiconductorsICAnalog Circuit DesignApplication-Specific Integrated Circuits (ASIC)ASICCMOS

About

Analog and Mixed Signal designer currently working on Imaging Products, with know-how of design and layout of Analog & Mixed Signal Systems & IPs , System modelling, Lab testing, Silicon debug etc and experience of technically leading, mentoring and occasionally managing teams

Experience

Ams osram

3 roles

Senior Principal Engineer, R&D System Design

Promoted

Jan 2026 – Present · 3 mos

Principal Engineer, R&D Analog Design

Nov 2024 – Jan 2026 · 1 yr 2 mos

  • Low Noise MASH DS-ADC for High Precision ALS
  • 2nd Order DS-ADC for High Precision ALS
Analog DesignADC

Principal Engineer, R&D Analog Design

Apr 2022 – Nov 2024 · 2 yrs 7 mos

  • Low Power CT DS-ADC (>16Bit ENOB) for Biosensing Applications
  • VerilogA Modelling of a SPAD based ToF system
  • DRI for a Proximity sensor
Analog DesignBiosensing

Stmicroelectronics

Principal Engineer

May 2018 – Apr 2022 · 3 yrs 11 mos · Greater Noida · On-site

  • Imaging SoCs - SAR ADCs, LED driver, Power Management Blocks, Oscillators
  • ADC IP Design - Wide band CT DS ADC, MASH DS ADC
Analog DesignADC

Cirrus logic

Senior/Principal Analog Designer

Mar 2015 – Apr 2018 · 3 yrs 1 mo · Edinburgh, Scotland, United Kingdom · On-site

  • VCO Based ADC design
  • Boost Converter & Charge Pump
Analog DesignPower Management

Freescale semiconductor

2 roles

Design Engineering Manager

Promoted

Jul 2014 – Mar 2015 · 8 mos · Noida, Uttar Pradesh, India

  • AMS design & Verification for Automotive SoCs
AMS DesignVerification

Mixed Signal Design Engineer

Feb 2013 – Mar 2015 · 2 yrs 1 mo · Noida, Uttar Pradesh, India

  • AMS design & Verification for Automotive SoCs
AMS DesignVerification

Aura semiconductor

2 roles

Senior Member of Technical Staff

Promoted

Feb 2012 – Feb 2013 · 1 yr · Bengaluru, Karnataka, India · On-site

  • PLL Dividers
  • References and Regulators
PLLAnalog Design

Member of Technical Staff

Jan 2011 – Jan 2012 · 1 yr · Bengaluru, Karnataka, India · On-site

  • PLL Dividers
  • References and Regulators
PLLAnalog Design

St-ericsson

Technical Leader

Dec 2009 – Jan 2011 · 1 yr 1 mo · Bengaluru, Karnataka, India · On-site

  • Low Power LDOs
  • Charge Pumps
Low Power Design

Freescale semiconductor

Analog Design Engineer

Oct 2005 – Nov 2009 · 4 yrs 1 mo · Noida, Uttar Pradesh, India · On-site

  • Crystal Oscillators
  • USB FSLS Transcievers
  • Delta Sigma ADCs (16 bit Audio)
  • Headphone Amplifier
  • Bandgap Reference
Analog Design

Stmicroelectronics

Design Engineer

Jun 2004 – Oct 2005 · 1 yr 4 mos · Noida, Uttar Pradesh, India · On-site

  • General Purpose I/Os
  • Controlled Impedance I/Os
  • DDR/SDR/MMC I/Os
Analog Design

Dept. of information technology, govt. of india

Trainee, B.E Project

Jan 2004 – May 2004 · 4 mos

  • Study of Current conveyors
  • Design of current conveyors based Translinear circuits.
  • Design got published in Procedings of VLSI conference, 2005
I/O Design

Dept. of information technology, govt. of india.

Summer Intern

Jun 2003 – Jul 2003 · 1 mo

  • Summer Internship under guidance of Mr. Debashis Dutta.
  • Study of current mode circuits.
  • Design of differentiators, integrators and biquad filters.

Education

Delhi College of Engineering

BE — Electronics & Communications

Jan 2000 – Jan 2004

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