Anurag Biswal

Software Engineer

Bhubaneswar, Odisha, India2 yrs 11 mos experience

Key Highlights

  • Expertise in Physical Design and RTL to GDS conversion.
  • Proficient in using Fusion Compiler and Synopsys tools.
  • Strong foundation in VLSI and Digital IC Design.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design and Digital IC workflows.

Contact

LinkedIn

Skills

Core Skills

Fusion CompilerVlsi

Other Skills

VCLPUVMMiPowerTCLPlacement and RoutingFloorplanningPowerplanSynopsys FormalityStatic Timing AnalysisAPBDigital ElectronicsDigital IC DesignSystemVerilogVerilogC++

About

Worked upon tech nodes: 3nm, 1.8nm, 2nm I have an experience on the skills such as: 1) Place n Route 2) Floor Planning 3) Power Planning - PG Routing 4) Formality and VCLP analysis and debug 5) TCL Scripting 6) Static Timing Analysis Tools :- FmShell, VcStatic Shell, Pt Shell, TCL, Fusion Compiler

Experience

2 yrs 11 mos
Total Experience
1 yr 5 mos
Average Tenure
--
Current Experience

Synopsys inc

Research And Development Engineer-1

Jul 2023 – Jan 2026 · 2 yrs 6 mos · On-site

Fusion CompilerVCLP

Asiczen technologies

Digital Design Engineer-1

Feb 2023 – Jul 2023 · 5 mos · Bhubaneswar, Odisha, India · On-site

UVMVLSI

Power research and development consultants pvt ltd

Intern

Aug 2022 – Feb 2023 · 6 mos · Bhubaneswar, Odisha, India

MiPower

Education

Silicon Institute of Technology (SIT), Bhubaneswar

Bachelor of Technology - BTech — Electrical and Electronics Engineering

Aug 2019 – Jun 2023

D.A.V. PUBLIC SCHOOL,MCL,K.A.

12th

Apr 2018 – May 2019

DAV Public School MCL Kalinga Area, Talcher

Apr 2016 – May 2017

Stackforce found 100+ more professionals with Fusion Compiler & Vlsi

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