Lenin Yemineni

Software Engineer

Andhra Pradesh, India6 yrs 7 mos experience
Highly Stable

Key Highlights

  • Experienced in RTL Design and FPGA development.
  • Proficient in multiple programming languages including VHDL and C++.
  • Strong background in digital signal processing and communication.
Stackforce AI infers this person is a skilled RTL Design Engineer with expertise in FPGA technologies.

Contact

LinkedIn

Skills

Other Skills

Image ProcessingSignal ProcessingDigital ElectronicsXilinx VivadoIntel Quartus PrimeC (Programming Language)C++MatlabPSpiceMicrosoft WordLinuxTeam LeadershipTeamworkCadenceNI Multisim

Experience

6 yrs 7 mos
Total Experience
3 yrs 4 mos
Average Tenure
3 yrs 3 mos
Current Experience

Amd

2 roles

Sr Silicon Design Engineer

Promoted

Dec 2024 – Present · 1 yr 4 mos

Silicon Design Engineer 2

Dec 2022 – Nov 2024 · 1 yr 11 mos

Logic fruit technologies

2 roles

Module Lead - RTL Design

Promoted

Oct 2021 – Nov 2022 · 1 yr 1 mo

R&D Engineer in FPGA Department

Jun 2019 – Sep 2021 · 2 yrs 3 mos

  • FPGA-RTL Design Engineer

Education

National Institute of Technology, Andhra Pradesh

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2015 – Jan 2019

Stackforce found 100+ more professionals with Image Processing & Signal Processing

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