Dec 2016 – Sep 2020 · 3 yrs 9 mos · Noida Area, India

• At Synopsys I am closely working with customer. I work primarily involves helping user in general debug using our tool, automating their setup using Tcl/Python, building their custom platfrom which they can use as starting point and resolving their tool related queries.
• Performance analysis support – I have involved in a lot of performance analysis projects on Synopsys tool. Helping customer in achieving their performance number, Cycle model bring up along with workload bench marking, supporting Customer on vast Generic synposys IP like UMCLT2, CSI/DSI, DMAC.
• Virtualizer Platform for Software development – I also closely working with an automotive company supporting its user across all geographies. My work involves helping user debug its Embedded Software, automating their test regression, Ramping up of new users.
• I am also involved in onsite training session for new customer in India for Synopsys tool like Platform Architect and Virtualizer Studio.

Sep 2015 – Dec 2016 · 1 yr 3 mos · noida

• systemc/tlm based modelling for embedded SW development and architecture exploration

Jan 2014 – Jul 2015 · 1 yr 6 mos · Greator Noida

• Virtual Prototype of Universal Flash Storage (UFS) 2.0 -
• Overview-- Untimed functional LT based model of UFS system (host + device) with pre –existing UFS driver running on it.Integrating this UFS model into SoC virtual platform(QEMU or arm based)
• My role-
• modelling and verification of host controller, MIPI UNIPRO and integrating it with device controller made by other team members
• Qemu based arm Emulator platform to be set up and booting the actual device driver on it .

Oct 2013 – Jan 2014 · 3 mos · Greator Noida

• WatchDog timer IP-
• Developed tlm2.0 transaction based model for watchdog functionality.
• Team building -
• My responsibilities was to build a team of fresher which can used for later Virtual model development.this involved recruitment and training of team member .

Jul 2012 – Oct 2013 · 1 yr 3 mos · Noida

• BLUETOOTH LOW ENERGY CHIP (modelling)-
• My responsiblities were Modelling of HCI layer in BLE .Modelling of stack from c++ to systemC and extending it till link layer (i.e host+hci+link layer).
• USART with SPI supported IP (RTL+ verification + Modelling)
• My role in this project was early on in RTL design of baud rate generator (Verilog) and then was later later involved in verification of the whole IP ..
• Also developed LT model of the whole USART .

Aug 2011 – Mar 2012 · 7 mos · Noida, Uttar Pradesh, India

• presently doing a six month diplomma course in vlsi and embedded system from cdac.