Karthikeyan J G

Associate Partner

Bengaluru, Karnataka, India16 yrs 11 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in IP Verification methodologies.
  • Strong leadership in VLSI and SoC projects.
  • Proven track record in hiring top technical talent.
Stackforce AI infers this person is a VLSI and SoC expert with strong leadership in technical project management.

Contact

LinkedIn

Skills

Other Skills

DebuggingSystemVerilogVerilogVery-Large-Scale Integration (VLSI)System on a Chip (SoC)VHDLFunctional VerificationUniversal Verification Methodology (UVM)

Experience

16 yrs 11 mos
Total Experience
5 yrs 7 mos
Average Tenure
11 yrs 8 mos
Current Experience

Mediatek

3 roles

Senior Department Manager

Promoted

Jun 2024 – Present · 1 yr 10 mos

Department Manager

Promoted

Jun 2023 – Jun 2024 · 1 yr

Senior Staff Engineer

Aug 2014 – Jun 2023 · 8 yrs 10 mos

Adventura technologies

ASIC Verification Engineer

Mar 2012 – Jul 2014 · 2 yrs 4 mos · Bangalore

Tata elxsi

Senior Verification Engineer

Mar 2009 – Feb 2012 · 2 yrs 11 mos · Trivandrum

Education

Manipal Academy of Higher Education

Master’s Degree — VLSI-CAD

Jan 2012 – Jan 2014

Arunai Engineering College

Bachelor’s Degree

Jan 2005 – Jan 2008

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