Sourav Pal

Software Engineer

Bengaluru, Karnataka, India12 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Analog Circuit Design and PLL analysis.
  • Proven track record in high-speed custom designs.
  • Strong MATLAB skills for Jitter modeling.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog Circuit Design and PLL systems.

Contact

Skills

Core Skills

Analog Circuit DesignIntegrated Circuit Design

Other Skills

LC/Ring OscillatorHigh Speed Custom DesignTDC/PFD & CP designPLL Stability analysisJitter modelingMATLABAnalog Circuit VerificationClock Generation ModulesClock Propagation ModulesPhase Lock LoopDe-serializer DesignLow Power DesignUMC 80nmRC Oscillator DesignTSMC 180nm

About

Worked on LC/Ring Oscillator, High Speed Custom Design, TDC/PFD & CP design, PLL Stability analysis and Jitter modeling using MATLAB

Experience

12 yrs 7 mos
Total Experience
4 yrs 2 mos
Average Tenure
6 yrs 1 mo
Current Experience

Intel corporation

Analog Design Engineer

May 2020Present · 6 yrs · Bengaluru, Karnataka, India

  • As Clocking IP Execution Lead, responsible for both architectural & design reviews of various sub-blocks to ensure zero risk in silicon. Rich experience in LC/Ring oscillator and Custom high speed design.
LC/Ring OscillatorHigh Speed Custom DesignTDC/PFD & CP designPLL Stability analysisJitter modelingMATLAB+2

Synopsys inc

2 roles

A&MS Circuit Design Engineer Sr I

Nov 2019Apr 2020 · 5 mos

A&MS Circuit Design Engineer II

Apr 2018Oct 2019 · 1 yr 6 mos

Sankalp semiconductor pvt ltd

Design Engineer

Aug 2013Mar 2018 · 4 yrs 7 mos · Kolkata Area, India

  • Experienced in Analog Circuit Design and Analog Circuit Verification with focus on Clock Generation Modules(RC Oscillator, Crystal Oscillator) , Clock Propagation Modules(De-serializer, Serializer) and Different blocks of Phase Lock Loop(PFD, Charge Pump, Feedback Divider)
  • 1. Worked on PLL
  • Behavioral Model
  • Charge Pump Design
  • Phase Frequency Detector Design
  • Feedback Divider Design
  • 2. Designed low power De-serializer[2.7GBPS single data stream to 8 parallel data stream] in UMC 80nm
  • 3. Design of RC Oscillator of Oscillation frequency 20MHz in TSMC 180nm. It has tun-able frequency variation over temperature.
  • 4. Design of Crystal Oscillator of Oscillation frequency 32KHz in Hynix 90nm
Analog Circuit DesignAnalog Circuit VerificationClock Generation ModulesClock Propagation ModulesPhase Lock LoopIntegrated Circuit Design

Education

Indian Institute of Engineering Science and Technology (IIEST), Shibpur

Master of Technology (M.Tech.) — VLSI Design

Jan 2011Jan 2013

West Bengal University of Technology, Kolkata

Bachelor of Technology (B.Tech.) — Electronics and Communications Engineering

Jan 2007Jan 2011

Stackforce found 100+ more professionals with Analog Circuit Design & Integrated Circuit Design

Explore similar profiles based on matching skills and experience