Utkarsh Chaurasia

Software Engineer

Bengaluru, Karnataka, India6 yrs 3 mos experience
Highly Stable

Key Highlights

  • Experienced in ASIC and FPGA design.
  • Strong background in integrated circuit design.
  • Proficient in Cadence tools for hardware architecture.
Stackforce AI infers this person is a Hardware Design Engineer with expertise in ASIC and FPGA technologies.

Contact

LinkedIn

Skills

Other Skills

VerilogField-Programmable Gate Arrays (FPGA)CadenceHardware ArchitectureApplication-Specific Integrated Circuits (ASIC)Integrated Circuit DesignComputer HardwareCadence VirtuosoDigital Circuit DesignAnalog Circuit DesignMatlabSignal Processing

Experience

6 yrs 3 mos
Total Experience
6 yrs 3 mos
Average Tenure
6 yrs 3 mos
Current Experience

Qualcomm

5 roles

Senior Lead Engineer

Nov 2025 – Present · 5 mos · Bengaluru, Karnataka, India

Senior Engineer

Promoted

Nov 2023 – Nov 2025 · 2 yrs · Bengaluru, Karnataka, India

Engineer

Promoted

Nov 2021 – Nov 2023 · 2 yrs · Bengaluru, Karnataka, India

Associate Engineer

Jun 2020 – Nov 2021 · 1 yr 5 mos · Bengaluru, Karnataka, India

Interim Engineering Intern

Jan 2020 – Jun 2020 · 5 mos · Bengaluru, Karnataka, India

Semiconductor laboratory mohali

Research Intern

May 2019 – Jul 2019 · 2 mos · Mohali India

Education

Indian Institute of Information Technology, Allahabad

Bachelor of Technology — electronics and communication engineering

Jan 2016 – Jan 2020

Delhi public school - Varanasi

Intermediate ( 10+2 )

Jan 2015 – Jan 2016

Stackforce found 100+ more professionals with Verilog & Field-Programmable Gate Arrays (FPGA)

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