Robin Singh Som

Software Engineer

Bangalore Urban, Karnataka, India2 yrs 9 mos experience

AI EnabledAI ML Practitioner

Key Highlights

Expert in CPU design verification and debugging.
Led successful AI accelerator validation at Intel.
Strong collaboration with cross-functional teams.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in CPU architecture and validation.

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Skills

Core Skills

DebuggingArchitectureRtl Validation

Other Skills

CacheVerification and Validation (V&V)Electronics DesignDebugComputer ArchitectureStatic Timing AnalysisDigital ElectronicsDigital Circuit DesignSystemVerilogPython AutomationAI AcceleratorMicroarchitectureAssembly LanguageC (Programming Language)Physical Design

About

CPU Design Verification Engineer at AMD, working in the Core Debug team with primary focus on Execution Scheduler (EXSC) and Floating-Point (FP) units. Experienced in pre-silicon validation, RTL debug, and root-cause analysis across RTL, testbench, and microarchitecture layers. Graduated from IIT Delhi with an M.Tech in RFDT. Strong background in debug-driven validation, regression analysis, and collaborating with RTL and architecture teams to resolve core-level functional issues and support key silicon milestones.

Experience

2 yrs 9 mos

Total Experience

2 yrs 2 mos

Average Tenure

7 mos

Current Experience

Amd

Senior Silicon Design Engineer

Sep 2025 – Present · 7 mos · Banglore · Hybrid

Specialized in x86 CPU core debug, with primary focus on EXSC and Floating Point (FP) units.
Debugged complex RTL failures related to execution pipelines, scheduling logic, and FP datapaths.
Performed end-to-end root-cause analysis across RTL, testbench, and microarchitecture.
Analyzed waveforms, assertions, logs, and architectural traces to isolate failures.
Worked closely with design, architecture, and validation teams to drive bug resolution and signoff quality.

DebuggingCacheVerification and Validation (V&V)Electronics DesignDebugArchitecture+5

Intel corporation

2 roles

CPU Design Verification

Jul 2023 – Sep 2025 · 2 yrs 2 mos · Bengaluru, Karnataka, India · Hybrid

CPU Design Verification Engineer | AI Accelerator | CPU Microarchitecture | Intel AMX | RTL Validation | Python Automation
Hands-on experience in pre-silicon validation of AI accelerator features, including Intel Advanced Matrix Extensions (AMX) for server-class CPUs
Led RTL validation strategy for a key AI accelerator feature, achieving zero escapees and aligning with silicon milestones
Defined goals, owned regression testing, and collaborated cross-functionally with architecture, RTL, and DV teams
Identified a critical architecture-level bug and drove refinement of microarchitectural behavior
Debugged and triaged RTL and cluster-level failures, often implementing precise fixes and verifying them across environments
Improved architectural and functional coverage by closing coverage holes for critical instructions
Built a Python-based UI to convert FP16 to 8-bit Brain/Hybrid Float, streamlining test writing for the reference model
Conducted an internal technical session on Floating Point Numbers to promote team knowledge sharing
Managed weekly regressions, monitored failures, and drove high-quality signoff for owned features