Jul 2019 – Oct 2021 · 2 yrs 3 mos

• Involved in design, development, verification of Boot ROM, FSBL and PLM modules for Xilinx
• SoCs and boot flows involving them.

Jul 2017 – Jul 2019 · 2 yrs

• Involved in design, development of Boot ROM, FSBL and PLM modules for Xilinx
• SoCs and boot flows involving them.

Nov 2014 – Jul 2017 · 2 yrs 8 mos

• Involved in design, development of BootROM and FSBL modules for Zynq US+ devices and boot flows involving them.

Mar 2012 – Nov 2014 · 2 yrs 8 mos

• Involved in verification of BootROM and development of FSBL for Zynq SoC devices,

Jul 2008 – Mar 2012 · 3 yrs 8 mos · Bengaluru Area, India