sreenivasulu polineni — Software Engineer

Sreenivasulu Polineni is a strong research professional with a Doctor of Philosophy in the field of analog and mixed signal IC design from National Institute of Technology, Karnataka. From May to November 2018, he carried a research on resonant clocking technology with Intel Labs (BDL), Intel Technology Pvt. Ltd., Bangalore, India. He worked on PMIC design with Thalia Design Automation Ltd., Hyderabad from Aug 2020 to March 2022. He is having a very good tool experience on Cadence Virtuoso, ADEL/ADEXL, Verilog-A, AMS simulations, Layout and MATLAB. He was published 5 reputed SCI indexed journals and 5 IEEE international conferences. His research interests include low power analog and mixed-signal circuit design, analog to digital converters, calibration circuits, digital to analog converters, phase locked loops, dc-dc converters, LDOs, filters, system-level mixed-signal design, ASIC design and design methodologies.

Stackforce AI infers this person is a specialist in analog and mixed-signal IC design within the semiconductor industry.

Location: Bengaluru, Karnataka, India

Experience: 10 yrs 8 mos