RAKESH KUMAR KESHARI — Product Engineer

I began my professional career at Intel Corporation, Bangalore, and gained 1+ year of professional experience in VLSI Domain. I was responsible for the development and enablement of regression analysis for the on-site and cross-site projects (US and Israel) and also responsible for writing the script for creating the test case for regression analysis before the deployment of the tool to the designer. I have hand-on experience on Open Source EDA tools like ModelSim,ngSpice, Qflow, Yosys, Xilinx Vivado, Cadence Virtuoso to design VLSI Chip. I have basic understanding on VLSI Design Flow, Back End Design flow, VLSI Physical Design Flow, Clock Tree Synthesis,Signal integrity, Static Timing Analysis, Timing ECO, Circuit Design and Spice Simulation, Custom Layout and also have a good understanding in front end design RTL Design and Synthesis, Verilog coding, Hardware modeling using Verilog, Memory modeling using Verilog. I have also completed workshop on VLSI Chip Design using Open Source EDA conducted by IIT Guwahati and VSD Corp. Pvt. Ltd.

Stackforce AI infers this person is a VLSI Design Engineer with expertise in product validation and regression analysis.

Location: Noida, Uttar Pradesh, India

Experience: 5 yrs 6 mos