Thirumangai Manickavel — Software Engineer
12+ years of experience in RTL Design -- Knowledge of RISC-V CPU architecture and design -- Knowledge of 3GPP 5G NR & LTE Standards -- RTL development using Verilog -- Low power analysis using Power Artist and PTPX tools -- Hands on experience in Lint, Synthesis, LEC -- Working knowledge in AXI, APB & MIPI Protocols -- Testbench development using Verilog/System Verilog -- Matlab Modeling for testing -- Scripting using Perl/Shell -- Debugging of On-chip silicon issues -- Hands on experience in Linux
Stackforce AI infers this person is a seasoned RTL Design Engineer specializing in hardware design for telecommunications.
Location: Bengaluru, Karnataka, India
Experience: 13 yrs 7 mos
Skills
- Hardware Design
- Cpu Design
- Physical Layer
- Rtl Development
- Verification
Career Highlights
- 12+ years of experience in RTL design and verification.
- Expertise in 5G LTE SOC architecture and implementation.
- Proficient in hardware design and CPU architecture.
Work Experience
Marvell Technology
Principal Engineer (1 yr 5 mos)
Imagination Technologies
Staff Hardware Engineer (1 yr 4 mos)
MediaTek
Staff Engineer (4 yrs 11 mos)
Senior Design Engineer (2 yrs 9 mos)
Mbit Wireless
Design/Verification Engineer (3 yrs 2 mos)
Education
Bachelor of Technology - BTech at Pondicherry Engineering College
High School at St.Patrick Matriculation Higher Secondary School
S.S.L.C at S.D.A Higher Secondary School
