Aug 2020 – Jul 2023 · 2 yrs 11 mos · Palo Alto, California, United States · Hybrid

• NR/LTE demodulation firmware driver architecture, design, and development [RISC-V Andes processor]
• Completed interface between various subsystems with mutual consent to cope up memory constrained RTOS.
• Completed register interface and its placements, Interrupt, TDMA table emphasizing on high-speed communication with ASIC[HW] team, system team for various requirements.
• Defined Task sequencer features, TLB buffer size, number of queues, control NOC requirements and latency [time] estimation.
• Defined requirements for demodulation micro controller firmware, number of core requirements, CC mapping on core, memory requirements for demapper and VDSP task programming.
• Completed module design and written code for LTE PDCCH/PDSCH and NR PDCCH firmware[driver] using C, Python & JSON.
• Determined and tracked the timeline for multiple task/feature completion.
• Completed pre-silicon verification using FPGA for LTE PDCCH and NR PDSCH.

Dec 2019 – Mar 2020 · 3 mos · Greater Bengaluru Area

• Design and development of 5G up-link Firmware (used C, MATLAB, git, JIRA, Python)

Aug 2014 – Nov 2019 · 5 yrs 3 mos · Bengaluru, Karnataka, India

• 2/3/4G layer1 controller Modem software/firmware design and development [Intel/ARM multi core processor]
• Design, development of new feature & bug fixing for Layer1 controller code for various flagship products.
• Completed various products bring-up activity, live debugging as part of task force across the globe[India, USA, Germany & China].
• Lead cross team co-ordination [Drivers/Firmware, Access Stratum, Operating System etc.], defined interface for various components.
• Coding for various platform (Dual SIM dual stack, Hybrid DSDS, SR-DSDS, Single SIM, Triple mode IRAT)
• Worked as DRI (Direct responsible individual) for Intel flagship product. Attended tier-1 customer daily meeting.
• Prioritized the feature, task, and task breakdown. Time estimation for features and bugs.
• Analyzed and resolved thousands of log from field, System, and performance testing using Mobile analyzer, TEMS log analyzer, T32, crash Inspector, system tracing tools (STT).
• Helped and resolved multiple issues for certification of Mobile handset.
• Analyzed and solution provided for the multiple performance improvement of overall mobile handsets.

Jul 2013 – Aug 2014 · 1 yr 1 mo · Bangaon, West Bengal, India

• Technical lead for complete physical layer [WIOS, ALGO and Layer1, MPC 565/566 processor]
• Answerable for all query from customer. Responsible for delivery of complete software package.
• Responsible for task tracking, coding, testing and task assignments.
• Improved Rx-TX performance by 1 db coordinating with hardware team.
• Provided guidance to Layer1 controller and wireless In-Out system (WIOS) team members.
• Provided support to firmware team [Algorithm /BCL (Burst control layer), MATLAB], power management optimization.
• Designed camping time optimization, Call setup time optimization, Dual Antenna and HPP (High Penetrating Power). Out of coverage and recovery
• Completed design, code and verification of A5/4 security Algorithm using H/W accelerator.

Mar 2012 – Jun 2013 · 1 yr 3 mos · Bangalore

• Layer 1 and Layer2[Access stratum] bug fixing and analysis.
• Analyzed around 500+ logs from Field testing, System testing using Mobile analyzer, T32, crash Inspector for Dual SIM Dual stack Release 7 and Release 9 features.
• Development & bug fixing for Layer1 controller software using C.
• Attended CCB meeting for all the changes across multiple team.
• Support for the certification work, calibration work of Mobile handset and support AS team for their analysis.

Jul 2010 – Feb 2012 · 1 yr 7 mos · Bangalore · On-site

• Layer1 controller Development [MPC565 processor]
• Fixed many issues and completed enhancements in Layer 1 controller code (Burst & channel control) using C.
• Studied and presented Time drift in DUT by movement of geostationary satellite.
• Bringing up Layer 1 integration test set-up (L1 –IT), used vector signal analyzer/generator [VSA/VSG], multi-meter for probing, measurement of RX/TX performance.
• Technically guided to junior team members and helped them in ramping up on Layer1 controller.
• Updated design document, performed unit testing and delivered Layer 1 sub modules – BCL (Burst Control Layer), BCL Loop, CCL (channel control layer) and PSIL (protocol stack interface layer)
• Implemented GPS enhancement features from L1-Controller side.

Aug 2007 – Jun 2010 · 2 yrs 10 mos · Bangalore · On-site

• Coding and circuit simulation using P-spice. Coding and code verification, Usage of CAN protocol.
• Updated software design document, bug analysis, failure analysis.
• Discussed with onsite team members, Bug raised with possible solution.
• Status update to respective leads and managers of the testing and issue in code.
• written test procedures, test scripts using Multi script language after understanding of requirements.
• Analyzed requirement for verification analysis, design verification analysis as per DO-178B standards.
• Peer review of Test procedures and Test scripts.