Nivedita Komandur

Software Engineer

Bengaluru, Karnataka, India2 yrs 11 mos experience

Key Highlights

  • Expert in Design Verification Engineering.
  • Proficient in UVM and SystemVerilog.
  • Strong foundation in VLSI design.
Stackforce AI infers this person is a Design Verification Engineer in the semiconductor industry.

Contact

LinkedIn

Skills

Other Skills

Universal Verification Methodology (UVM)SystemVerilogVerilogCadence VirtuosoIntel Quartus PrimePerlLinux

Experience

2 yrs 11 mos
Total Experience
2 yrs
Average Tenure
11 mos
Current Experience

Qualcomm

Senior Design Verification Engineer

Jun 2025 – Present · 11 mos · India

Mediatek

2 roles

Design Verification Engineer

Jun 2023 – Jun 2025 · 2 yrs · Bengaluru, Karnataka, India

Graduate Technical Intern

Sep 2022 – Jun 2023 · 9 mos · Bengaluru, Karnataka, India

Education

Vellore Institute of Technology

Master of Technology - MTech — Vlsi

Mahatma Gandhi Institute of Technology

Bachelor of Technology - BTech

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