Mar 2021 – Sep 2021 · 6 mos

• Machine learning applications and related software development: Bringing machine learning to software applications used in circuit design environment.

Apr 2016 – Mar 2021 · 4 yrs 11 mos

• Machine learning and circuit simulation software development: Worked on end-to-end application development and deployment of MLParest and improved circuit simulation efficiency using graph algorithms.

Feb 2011 – Apr 2016 · 5 yrs 2 mos

• Working in the Circuit Engine team on Intel’s internal circuit simulator. The job position includes development, research and pathfinding to support current circuit simulation challenges. The specific contributions involved algorithmic development in the analog simulator for post-layout simulation capabilities, and fastSPICE simulations. The algorithms delivered 3X-100X speedup on a variety of circuits, without loss of accuracy. I was also responsible for owning and setting up the development environment, SVN/GIT repositories, regressions, tool release, etc. As a part of the job, I provided support and training of simulator tool to several Intel engineers

Jun 2010 – Aug 2010 · 2 mos · Hillsboro, OR

• Worked on the algorithmic investigation, implementation and verification of hierarchical graph based circuit partitioning. I developed, investigated, tested, and improved a few partitioning schemes, for parallel multithreaded circuit simulations, to be used in the Intel’s internal next generation circuit simulator.

Jun 2009 – Aug 2010 · 1 yr 2 mos · Albuquerque-Santa Fe Metropolitan Area

• Worked on a L1 norm based model order reduction technique, and also on a device model evaluator interface between the XYCE circuit simulator and the Rythmos, a time integration package under the Trillinos software package.

Jun 2008 – Aug 2008 · 2 mos · Hillsboro, OR

• Worked on improving the characterization, storage and runtime of Multi Port Current Source
• (MCSM) modeling of large, nonlinear I/O buffer circuits.