Girish Agrawal — Software Engineer
Recently joined Qualcomm QDSP Performance Team for E2E Post-Silicon Power and Performance Validation of NSP IP in Snapdragon Processors. Previously at Altera, a part of Intel, my role revolved around ensuring the power integrity of Intel IPUs and vRAN Accelerators, contributing to the technical readiness and design robustness during pre-silicon phases. We've successfully led post-silicon power validation activities, steering projects from initial power-on to market release with efficiency and precision. Prior to Intel as a Senior SQA Engineer at NVIDIA, I honed my skills in performance analysis and power measurement, crafting comprehensive test plans and benchmarks for various system modules. Our collaborative efforts with cross-functional teams significantly enhanced product quality, ensuring their market readiness and competitive edge.
Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in power and performance analysis.
Location: Bengaluru, Karnataka, India
Experience: 13 yrs 9 mos
Skills
- Post-silicon Validation
- Power Validation
- Performance Analysis
- Quality Assurance
- Test Planning
- Power Measurement
- Coaching
- Teaching
Career Highlights
- Expert in post-silicon power validation for Snapdragon processors.
- Led power validation projects from inception to market release.
- Strong background in performance analysis and quality assurance.
Work Experience
Qualcomm
Staff Engineer (1 yr 7 mos)
Altera
FPGA Silicon Validation Engineer (2 yrs 4 mos)
MindScripts Tech
Freelance Aptitude Trainer (Weekends) (2 yrs 6 mos)
SEED Infotech Ltd
Freelance Aptitude Trainer (Weekends) (2 yrs 10 mos)
NVIDIA
Senior SQA Engineer (9 yrs 9 mos)
Education
B.Tech at Government College of Engineering, Amravati.
HSC at Akot Krishi Jr. College Akot