R

Ram Reddy J

Software Engineer

Hyderabad, Telangana, India17 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 7.5 years in SoC Design Emulation.
  • 6.1 years in ASIC Functional Verification.
  • Senior Member of Technical Staff at AMD.
Stackforce AI infers this person is a Semiconductor Design Engineer with extensive experience in ASIC and SoC verification.

Contact

LinkedIn

Skills

Core Skills

EmulationAsic

Other Skills

SoCDebuggingARMVerilogEmbedded SystemsVHDLSystemVerilogRTL designStatic Timing AnalysisModelSimRTL codingEDANCSimPhysical DesignOpen Verification Methodology

About

7.5 years of experience in SoC Design Emulation (on Cadence Z1/Z2/X2,Mentor Veloce and SNPS ZEBU Emulators) 6.1 years of experience ASIC Functional Verification

Experience

17 yrs
Total Experience
4 yrs 3 mos
Average Tenure
11 yrs
Current Experience

Amd

3 roles

Senior Member of Technical Staff

Jul 2023 – Present · 2 yrs 10 mos

Sr Design Engineer

Jun 2015 – May 2019 · 3 yrs 11 mos

Member Of Technical Staff

May 2015 – Present · 11 yrs

  • Working on the Design Emulation

Appliedmicro

Sr Design Engineer

Feb 2013 – May 2015 · 2 yrs 3 mos

Soctronics

Sr Asic Engineer

Jul 2011 – Jan 2013 · 1 yr 6 mos · Greater Hyderabad Area

  • working at AMD client

Tata elxsi

Sr Engineer

Mar 2009 – Jun 2011 · 2 yrs 3 mos · Bengaluru, Karnataka, India

  • Worked as Design & Verification Engineer

Education

Jawaharlal Nehru Technological University

Master's degree — Digital Elctronics

Jan 2006 – Jan 2008

Stackforce found 100+ more professionals with Emulation & Asic

Explore similar profiles based on matching skills and experience

Amrik Virdi

Amrik Virdi

Emulation/Prototyping Methodology

at AMD

Delhi, India29 yrs 3 mos exp
EmulationPrototypingFPGA
AG

Amit Gupta

Director of Engineering

at Arm

Noida, India25 yrs exp
IP/Subsystem Design and Verification
AB

Avneet Bhatia

ASIC Director

at Juniper Networks

Bengaluru, India26 yrs 6 mos exp
Satyam Jain

Satyam Jain

Pre silicon validation Engineer

at Accenture in India

Bengaluru, India5 yrs 5 mos exp
Pre silicon validationVLSI-Emulation
Prasanth S.

Prasanth S.

Technical Lead

at Eximietas Design

Bangalore Urban, India10 yrs 7 mos exp
FPGA DesignASICSoC
Dhruv Vakharia

Dhruv Vakharia

Engineering Manager

at NVIDIA

Bengaluru, India12 yrs 1 mo exp
SD

Sumit Deshmukh

SoC Design Engineer

at Intel Corporation

Bengaluru, India13 yrs 10 mos exp
SoC DesignPCIeRTL DesignVerificationVLSI Design
satish kumar agarwal

satish kumar agarwal

Director of Engineering

at Siemens EDA (Siemens Digital Industries Software)

Noida, India19 yrs 6 mos exp