Vinit Berwal — Software Engineer

Working in pre-post silicon validation. PCIe Gen4, Gen5, Gen6. CXL, NVME over PCIe. PCIe based application development. FPGA & SOC architecture. ARM based SOC architecture. Writing System level Stress Test cases to find RTL bugs in SOCs. Software development for Cortex - A72/A78/X86 based SOCs FPGA design development using VIVADO, SOC IPs driver Software development C, Linux and assembly. Debugging critical IP level or system level issues. Experience in debugging on Pre-Silicon Environment which includes prototyping and emulation platforms / Post-Silicon which includes board/device bringup and features validation on Silicon.

Stackforce AI infers this person is a Silicon Validation Engineer with expertise in FPGA and SOC architecture.

Location: Noida, Uttar Pradesh, India

Experience: 12 yrs 11 mos