Shivaranjani S.

Software Engineer

Chennai, Tamil Nadu, India4 yrs 10 mos experience

Highly Stable

Key Highlights

Expert in DFX constraint development and validation.
Proficient in debugging and post-silicon support.
Strong foundation in digital design and communication systems.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in DFX and digital design.

Contact

Skills

Core Skills

Design EngineeringDebuggingProblem SolvingDigital Designs

Other Skills

Oral CommunicationPrimetimeTCLCoverage AnalysisScan InsertionCompressionTesting ToolsDFTAutomatic Test Pattern Generation (ATPG)Presentation SkillsTimingSystemVerilogCommunicationMatlabOptical Communications

Experience

4 yrs 10 mos

Total Experience

3 yrs 5 mos

Average Tenure

1 yr 6 mos

Current Experience

Qualcomm

Senior Engineer

Nov 2024 – Present · 1 yr 6 mos · Chennai, Tamil Nadu, India · Hybrid

Oral CommunicationPrimetimeTCLCoverage AnalysisScan InsertionCompression+26

Amd

3 roles

Sr. Silicon Design Engineer

May 2023 – Dec 2024 · 1 yr 7 mos · Hybrid

Worked on DFX constraint development at the block level for different IPs
Validating and optimising chip level dfx constraints

Problem SolvingDebugging

Silicon Design Engineer 2

Jul 2021 – May 2023 · 1 yr 10 mos · Hybrid

Worked on Top Level Extest DRC, ATPG and Pattern Translation for 2 chiplets
Validated generated patterns using VCS Sims and Emulation and delivered patterns with minimal resubmissions
Provided post silicon debug and diagnosis support

Problem SolvingDebugging

Co-op Intern

Oct 2020 – Jul 2021 · 9 mos · Hybrid

Worked on Spyglass DFT RTL checks for 2 different chiplets
Achieved the target SAF coverage at the RTL level by performing extensive coverage analysis to identify potential coverage drops
Estimated SoC coverage and studied the impact in full chip coverage due to. Identified coverage holes

Problem SolvingDebugging