Rakesh Singh — CEO
Stackforce AI infers this person is a Design Verification Engineer with expertise in ASIC and functional verification methodologies.
Location: Bengaluru, Karnataka, India
Experience: 13 yrs 11 mos
Career Highlights
- Extensive experience in design verification engineering.
- Proficient in multiple hardware description languages.
- Strong background in functional verification methodologies.
Work Experience
Cadence
Sr. Principal Solutions Engineer (11 mos)
Senior Design Verification Engineer (2 mos)
Cadence Design Systems
Sr Solutions Manager (7 mos)
Solutions Manager (1 yr 3 mos)
Principal Solutions Engineer (1 yr 8 mos)
Lead Solutions Engineer (3 yrs 9 mos)
SeviTech Systems Pvt. Ltd.
Senior Verification Engineer (2 yrs 4 mos)
Sibridge Technologies
Member Technical Staff (1 yr 1 mo)
Sasken Technologies Limited
Verification Engineer (2 yrs 4 mos)
Education
Master of Technology - MTech at Birla Institute of Technology and Science, Pilani
Bachelor of Engineering (B.E.) at Cambridge Institute of Technology
