Palachandra M V

Software Engineer

Bengaluru, Karnataka, India16 yrs 4 mos experience

Highly Stable

Key Highlights

Expert in Machine Learning compiler development.
Proficient in optimizing video codecs on DSPs.
Strong background in algorithm testing and debugging.

Stackforce AI infers this person is a specialist in Embedded Systems with a focus on Digital Signal Processing and Machine Learning.

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Skills

Core Skills

Embedded SystemsMachine LearningDigital Signal Processing

Other Skills

CXtensa XplorerVision P6 ProcessorHEVCAVC-IntraC66x DSPARM A15Audio CodecMCSDKDebuggingLinuxUnixEmbedded SoftwareDevice DriversRTOS

About

Experience in working on Machine Learning compiler Experience in implementation of Convolutional Neural Network algorithms on Tensilica Vision DSP Processors Experience in various video codecs implementation & optimization on Texas Instruments DSPs (C66xx) based processors Working knowledge of video codec standards like HEVC, H.264 and AVC-Intra Experience in multi-core C66x DSP porting and optimization of HEVC and AVC-Intra encoders Experience in porting audio codec components on Texas Instruments DSPs (C66xx) and ARM-A15 processors Hands on experience in Algorithm Testing Methodologies and Debugging Hands on experience in support and flow optimization on for MCSDK. (Multicore Software Development Kit) Worked on Automation of Manual Installation of Message queue and Message Broker using Perl Script Familiar with the relevant phases of software development life cycles Worked in Banking Sector providing IT Support

Experience

16 yrs 4 mos

Total Experience

6 yrs 4 mos

Average Tenure

3 yrs 7 mos

Current Experience

Qualcomm

Software Engineer

Oct 2022 – Present · 3 yrs 7 mos · Bengaluru, Karnataka, India

Path partner technology consulting private limited

3 roles

Technical Lead

Jul 2017 – Oct 2022 · 5 yrs 3 mos

Project Name: Software Development for Tensilica Vision DSP processor
Project Summary: Fixed point Optimized Library implementation for Convolutional Neural Network on Tensilica Vision DSP processor
Environment: C, Xtensa Xplorer, Vision P6 Processor
Responsibilities:
Reference code implementation for Convolutional Neural Network layers
Porting and optimizing of reference code on Vision P6 processor
Involving in team discussion regarding design and optimization approach and working towards successful completion of project deliverables

CXtensa XplorerVision P6 ProcessorEmbedded SystemsMachine Learning

Senior Software Engineer

Jul 2013 – Jul 2017 · 4 yrs

Project : HEVC on TI's Multi-core c66x DSP (TMS320C6678)
Description : The project aims at development, multicore porting and optimization of HEVC codec on TI's Multi-core c66x DSP running at 1.25 ghz
Project : Design and Integration of Audio Codec
Description : The project aims at design, porting and Integration of components of Audio Codec on TI's C66x processor and ARM A15 processor
Project : Support of MCSDK
Description : Support and flow optimization of Multicore Software Development kit. (MCSDK)

HEVCAVC-IntraC66x DSPARM A15Digital Signal ProcessingEmbedded Systems

Software Engineer

Jul 2011 – Jul 2013 · 2 yrs

AVC Intra Codec on TI's Multi-Core C66x DSP (TMS320C6678)
This project aims at development and optimization of AVC Intra/Ultra encoder on TI's multi-core DSP platform involving 8 cores of C66x running at 1.25 Ghz.

AVC IntraC66x DSPDigital Signal ProcessingEmbedded Systems