Jayanth Srighakollapu

Software Engineer

Bengaluru, Karnataka, India10 yrs 11 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in DDR Firmware and validation processes.
Proven leadership in Pre-Silicon and Post-Silicon validation.
Strong background in ARM architecture and validation suites.

Stackforce AI infers this person is a specialist in semiconductor validation and SoC development.

Contact

Skills

Core Skills

ValidationDdr Subsystem ValidationArchitecture Validation

Other Skills

DDR FirmwareDebug Subsystem validationValidation suite enhancementCVerification EnvironmentVerilogMatlabARM Assembly languagePspiceLTSpiceMicrosoft OfficeARMVHDLVLSILinux

About

Broad experience in full development cycle of SoC from Pre-Silicon to Silicon Bring-up to Productization specializing in DDR Firmware (LPDDR4/LPDDR5) & DDR Subsystem validation.

Experience

10 yrs 11 mos

Total Experience

5 yrs 5 mos

Average Tenure

10 yrs

Current Experience

Qualcomm

4 roles

Staff Engineer

Promoted

Dec 2024 – Present · 1 yr 5 mos

Leading Pre-Silicon and Post-Silicon validation of DDR Subsystem on Qualcomm SOCs across MDM, Mobile and advanced DRAM technologies for data center products

DDR FirmwareDDR Subsystem validationValidation

Lead Engineer, Senior

Dec 2021 – Nov 2024 · 2 yrs 11 mos

Senior Engineer

Promoted

May 2019 – Dec 2021 · 2 yrs 7 mos

Engineer

Jul 2013 – Aug 2016 · 3 yrs 1 mo · India

Responsible for Pre-silicon and Post-silicon validation of Debug Subsystem

Debug Subsystem validationValidation

Arm

Intern

Jul 2012 – Jun 2013 · 11 mos · Bengaluru Area, India

Part of Architecture validation team.
worked on
1. Enhancing the validation suite for UNPREDICTABLE cases for next generation ARM processor
2. Enhancing the validation suite for Big-Endian ARM processor.

Architecture validationValidation suite enhancement