Indulakshmi V — Software Engineer
Good understanding of the ASIC and FPGA design flow Extensive experience in writing RTL models using Verilog HDL. Good experience in writing Test benches using SystemVerilog and UVM Very good knowledge in verification methodologies Experience in using industry standard EDA tools for the front-end design and verification
Stackforce AI infers this person is a Verification Engineer specializing in ASIC and FPGA design within the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 3 yrs 8 mos
Skills
- Verification Engineering
- Rtl Design
Career Highlights
- Strong expertise in ASIC and FPGA design flows.
- Proficient in RTL modeling and verification methodologies.
- Experienced in industry-standard EDA tools.
Work Experience
AMD
Verification Engineer (3 yrs 8 mos)
Education
Trainee at Maven Silicon
M.E at Anna University Chennai
Bachelor of Technology (B.Tech.) at NEHRU COLLEGE OF ENGINEERING AND RESEARCH CENTRE, PAMBADY
