Parandhaman K

Senior Software Engineer

Bengaluru, Karnataka, India7 yrs 8 mos experience

Key Highlights

Expert in ARM architecture and validation processes.
Strong background in power and performance analysis.
Proficient in Python for automation and analysis.

Stackforce AI infers this person is a skilled engineer in semiconductor validation and embedded systems.

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Skills

Core Skills

Arm ArchitectureLinuxValidationDebuggingAutomationEmbedded Systems

Other Skills

DDR SDRAMC (Programming Language)Digital ElectronicsPython (Programming Language)Operating SystemsKernel ProgrammingARM V8A/V9APower AnalysisPerformance AnalysisThermal AnalysisValidation of PeripheralsPre/Post silicon validationFunctional validationAutomation scriptingPre-silicon emulation

About

I am a passionate Engineer with a strong understanding of complete CPU-to-DDR data path, including ARM-based processors (A, R, M), MMU, caches, NoC, memory controllers, PHY, and DDR. I also have expertise in SoC clock, power(active and idle), and interrupt management. Driven by curiosity and a commitment to excellence, I thrive on exploring new challenges and delivering impactful solutions.

Experience

7 yrs 8 mos

Total Experience

1 yr 7 mos

Average Tenure

1 yr 1 mo

Current Experience

Arm

Senior Software Engineer

Apr 2025 – Present · 1 yr 1 mo · Bengaluru, Karnataka, India · Hybrid

ARM ArchitectureDDR SDRAMC (Programming Language)Digital ElectronicsPython (Programming Language)Linux+2

Qualcomm

3 roles

Validation Engineer II (Contract)

Promoted

Jun 2024 – Mar 2025 · 9 mos · Bengaluru, Karnataka, India · On-site

Pre and Post silicon validation of ARM V8A/V9A based CPU's
Power, Performance and Thermal Analysis of ARM V8A/V9A based processors
Validation of Peripherals like Timer and Watchdog

ARM V8A/V9APower AnalysisPerformance AnalysisThermal AnalysisValidation of PeripheralsARM Architecture+1

Validation Engineer I (Contract)

Sep 2020 – Sep 2023 · 3 yrs

Pre/Post silicon validation of Qualcomm modem chips
Performance analysis of SOC by collecting NOC bandwidth and latency trace data
Functional validation of SMMU (System Memory Management Unit) ip
Debugging customer issues on silicon (more focused towards Cache issues)
Practice script based automation script to sanitize the RTL build
Python based automation script to parse the log files

Pre/Post silicon validationPerformance analysisFunctional validationDebuggingAutomation scriptingValidation

Interim Intern

Jul 2019 – Sep 2020 · 1 yr 2 mos

Arm based system on chip pre-silicon emulation.
Test case automation scripts using python
Developing histogram charts using python for system on chip performance analysis

Pre-silicon emulationTest case automationPerformance analysisAutomationEmbedded Systems