Aaliya Sameja

Software Engineer

Bikaner, Rajasthan, India4 yrs 9 mos experience

Most Likely To Switch

Key Highlights

Experienced in validation and automation for power management systems.
Proficient in Python and embedded systems development.
Strong problem-solving skills with a focus on digital design.

Stackforce AI infers this person is a Semiconductor Engineer with expertise in embedded systems and validation automation.

Contact

Skills

Core Skills

System On A Chip (soc)FirmwareEmbedded SystemsValidationAutomation

Other Skills

PCIeProblem SolvingPython (Programming Language)EmulationTest CasesDebuggingStatic Timing AnalysisSystemVerilogRTL CodingXilinx VivadoDigital DesignsInternet Protocol (IP)PrototypingField-Programmable Gate Arrays (FPGA)Communication

About

A happy Engineer who never get bored of solving new problems.A girl who Never settle for LESS.

Experience

4 yrs 9 mos

Total Experience

1 yr 7 mos

Average Tenure

2 yrs 11 mos

Current Experience

Synopsys inc

3 roles

Staff Engineer

May 2026 – Present · 1 mo

PCIeSystem on a Chip (SoC)Firmware

Solution engineering, Sr Engineer

Promoted

Mar 2024 – May 2026 · 2 yrs 2 mos

Solution Engineer II

Jul 2023 – Mar 2024 · 8 mos

Intel corporation

2 roles

Intern

Jul 2022 – Jul 2023 · 1 yr · Bengaluru, Karnataka, India

ROLES & RESPONSIBLITIES
I) Project: Implementation of Post Processing Checkers for SYS PM IP flow Validation.
Responsible for validation of Reset Bring up, Soc boot flows, Sleep state flow and other power management flows using Emulation platform.
Implemented register sweep tests to validate the RTL registers of several IPs.
Implemented “Post Processing Checkers” that can verify the reset bring up, sleep state & cross-IP flows in the System Power Management IP.
Wrote self-checking positive and negative various unit test cases to validate post processing checkers.
II)Project: Emulation Testbench Infrastructure development for HW-FW Co-validation.
Implemented Python database APIs to develop testbench infrastructure for system power management IP.
Debugged Hardware Firmware co-validation flows using the Zebu emulator and analyzed results through Verdi Synopsys tool.
Developed scripts to automate the Xtensa microcontroller image generation.