Alokpati pandey

Software Engineer

Bengaluru, Karnataka, India17 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 15 years of semiconductor verification experience
  • Expert in SystemVerilog and UVM methodologies
  • Proven track record in team leadership and project management
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in IP and SoC-level verification.

Contact

Skills

Core Skills

SystemverilogUvm

Other Skills

AXIJESDCPRItest planningtestbench developmentcoverage analysisdebuggingproject managementPythonTestingCode CoverageArchitectureVerilogSoCAssertion Based Verification

About

Seasoned Verification Engineer with over 15 years of experience in the semiconductor industry, specializing in IP and SoC-level verification. ✔️ I am proficient in SystemVerilog, UVM, and protocols such as AXI, JESD, and CPRI. ✔️ My strong background in test planning, testbench development, and coverage analysis is complemented by exceptional debugging abilities and strategic verification methodologies. ✔️ I am also skilled in Perl scripting and have a proven track record of leading teams to success through effective mentorship and project management. ✔️ My ability to consistently deliver ahead of schedule and drive technological innovation has been a key factor in my career. ✔️ As an effective communicator, I excel at translating complex technical concepts into clear, actionable insights for cross-functional teams. This ensures design quality and stakeholder alignment. ✔️ I am passionate about pushing the boundaries of technology and contributing to the success of my team and organization.

Experience

17 yrs
Total Experience
3 yrs 1 mo
Average Tenure
11 yrs 7 mos
Current Experience

Intel corporation

SoC Design Verification Engineer

Nov 2014Present · 11 yrs 7 mos · Bengaluru Area, India

SystemVerilogUVMAXIJESDCPRItest planning+4

Lsi corporation

Design & Verification Engineer

Nov 2012Nov 2014 · 2 yrs · Bengaluru Area, India

Einfochips

Verification Engineer

Mar 2011Nov 2012 · 1 yr 8 mos · Bangalore

Amd

x86 Core Verification Engineer

Mar 2011Nov 2012 · 1 yr 8 mos · Bangalore

Wipro technologies

ASIC Verification Engineer

Jun 2010Mar 2011 · 9 mos

Saankhya labs pvt. ltd.

2 roles

Member Of Technical Staff

Jun 2009Jun 2010 · 1 yr · Bengaluru Area, India

Internship

Jun 2008May 2009 · 11 mos · Bengaluru Area, India

Education

Manipal Institute of Technology

M.Tech. — Digital Electronics & Adv Comm

Jan 2007Jan 2009

Stackforce found 100+ more professionals with Systemverilog & Uvm

Explore similar profiles based on matching skills and experience