Ashutosh Purohit

Product Engineer

Bengaluru, Karnataka, India9 yrs 4 mos experience

Key Highlights

Expert in Physical Design and SoC methodologies.
Proven track record at leading tech companies.
Strong skills in High Performance Computing and EDA tools.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and SoC architecture.

Contact

Skills

Core Skills

Physical DesignSoc Design

Other Skills

FloorplanningPNREM IRStatic Timing AnalysisSoC top PnRMethodologyPPAPartitionClock Tree SynthesisCadence SoftwareHigh Performance Computing (HPC)Place & RouteScriptingSemiconductorsSoC top FP

Experience

9 yrs 4 mos

Total Experience

Average Tenure

Current Experience

Amd

Member of Technical Staff Physical Design

Aug 2025 – Present · 10 mos · Bengaluru, Karnataka, India · Hybrid

FloorplanningPNREM IRStatic Timing AnalysisSoC top PnRPhysical Design+1

Intel corporation

SoC Floorplan Physical Design Engineer

Feb 2024 – Aug 2025 · 1 yr 6 mos · Bengaluru, Karnataka, India · Hybrid

FloorplanningMethodologyPPAPartitionClock Tree SynthesisCadence Software+9

Qualcomm

4 roles

Senior Lead Engineer

Promoted

Dec 2022 – Feb 2024 · 1 yr 2 mos

P&RMethodologySystem on a Chip (SoC)Place & RoutePPALow-power Design+31

Senior Engineer

Promoted

Dec 2019 – Dec 2022 · 3 yrs

P&RMethodologyTCLPerlInnovusVerilog+39

Engineer

Jul 2017 – Dec 2019 · 2 yrs 5 mos

P&RTCLPerlInnovusVerilogSystem on a Chip (SoC)+36

Trainee

Jan 2017 – Jun 2017 · 5 mos

P&RTCLPerlInnovusVerilogSystem on a Chip (SoC)+34

Education

Birla Institute of Technology and Science, Pilani

Master of Engineering (M.Eng.) — Microelectronics

Jan 2015 – Jan 2017

M.B.M. Engineering College, Jodhpur

Bachelor of Engineering (BE) — Electrical and Electronics Engineering

Jan 2010 – Jan 2014

Central Academy Jodhpur Education Society

Jan 2006 – Jan 2010

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