Mukhesh Kanamarlapudi

Software Engineer

Kurnool, Andhra Pradesh, India3 yrs 10 mos experience

Key Highlights

Senior ASIC Design Engineer at Nvidia
Expertise in VLSI and digital design
AIR 4 in GATE EC 2020

Stackforce AI infers this person is a VLSI and Digital Design expert with strong automation skills.

Contact

Skills

Core Skills

Rtl DevelopmentDigital DesignAutomationVerification

Other Skills

System VerilogPython (Programming Language)SPIDesign ReviewMicroarchitectureInterpersonal SkillsFront-End DesignAnalytical SkillsProblem SolvingAXILintAPBAMBA AHBGate Level SimulationHigh-speed Digital Design

About

Currently working in Nvidia as Design Engineer in AXI fabric team. Previously worked in TI on protocols(SPI and AHB), R5, RiscV processor and signal processing blocks. I have pursued my MTech from IISC Bangalore and have graduated with CGPA of 9.5. I am passionate to work on VLSI & electronics and have done multiple projects related to VLSI design during my MTech and BTech. I have secured an AIR 4 in GATE EC 2020. I have graduated in ECE from NIT durgapur with CGPA of 9.4.

Experience

3 yrs 10 mos

Total Experience

Average Tenure

Current Experience

Nvidia

Senior ASIC Engineer

Nov 2024 – Present · 1 yr 7 mos · Bengaluru, Karnataka, India · On-site

Texas instruments

Digital Design Engineer

Aug 2022 – Nov 2024 · 2 yrs 3 mos · Bengaluru, Karnataka, India

Exposure to complete flow from architecture to GDSII for a transceiver SoC.
Expertise on
rtl design using system verilog, verilog and vhdl;
synthesis and constraints
simulation and GLS
Exposure on cortex R5 and RiscV processor and firmware coding using API
Familar with proctocols like SPI, QSPI, OSPI, AHB and JESD.
Executed enhanced SPI protocol.
Implemented memory controller design.
Developed python script to automate configuration register bank general across various features like 2D parity generation and widths.
Developed verification test bench for signal processing blocks like FFT and HBT.