Navesh Priyankar

Software Engineer

Bengaluru, Karnataka, India14 yrs 9 mos experience

Key Highlights

Expertise in advanced GPU and display technologies.
Strong background in hardware design and architecture.
Proven experience in SoC verification and communication protocols.

Stackforce AI infers this person is a Graphics and Hardware Engineering specialist with extensive experience in semiconductor and communication technologies.

Contact

Skills

Core Skills

GraphicsArchitectureHardware Design

Other Skills

Graphics shaderReal-time GraphicsVulkan APITest PlanningSpecificationsAgile MethodologiesRoot CausePerformance AnalysisComputer ScienceLTER (Programming Language)Electrical EngineeringSemiconductor EngineeringApplication-Specific Integrated Circuits (ASIC)Hardware Engineering

Experience

14 yrs 9 mos

Total Experience

Average Tenure

Current Experience

Intel corporation

2 roles

Graphics Software Engineer

Promoted

Jul 2019 – Present · 6 yrs 11 mos

Building the most advanced GPU's and Displays at Intel!

Graphics shaderArchitectureGraphics

Component Design Engineer

Jul 2016 – Jun 2019 · 2 yrs 11 mos

Virtual Platform development for next generation Intel Modems

ArchitectureHardware Design

Qualcomm

2 roles

Senior Engineer

Promoted

Apr 2015 – Jul 2016 · 1 yr 3 mos · Bengaluru Area, India

Virtual Platform for WLAN MAC - Implementing SystemC/C++ loosely timed WLAN MAC model for
the latest Qualcomm Atheros WLAN hardware architecture. Gained an in-depth understanding of
802.11 MAC and PHY protocols and hardware architecture. Got an exposure to other communication
protocols such as Bluetooth, Zigbee, cellular -3G, LTE among others

ArchitectureHardware Design

Engineer

Jul 2012 – Apr 2015 · 2 yrs 9 mos · Bengaluru Area, India

SoC Verification -Worked on Top level and core level hardware verification for Qualcomm Snapdragon
and Atheros chipsets. Developed a broad level understanding of top level SoC architecture working
on modules like - USB, SDC, Ethernet, WLAN and chip I/O etc. Used the various verification methodologies
functional verification using SV-UVM, assertion based verification and formal techniques for
the different modules

ArchitectureHardware Design

Inria

Intern

Jun 2010 – Jul 2010 · 1 mo · Nancy Area, France

Set up a methodology of comparison of clustering results based on unsupervised Bayesian reasoning
using neural networks. Tested on textual data from regional labs in order to characterize the evolution of research topics with time. Realised a perfectly operational platform for time step clustering comparison

Antaragni iit kanpur

Head, Competitions

Nov 2009 – Oct 2010 · 11 mos · Kanpur Area, India

Headed a team of 250 people with the responsibility of designining and executing all competitions in
one of the biggest cultural festivals in India

Zero mass foundation (zmf)

Intern

May 2009 – Jul 2009 · 2 mos · Hyderabad Area, India

Engineers for Social Impact(E4SI) fellow -Worked on Fingerprint de-duplication as a part of Reserve
Bank of India(RBI) initiative for banking based on fingerprint recognition for greater financial inclusion
and rural banking. Collected field data and tested using Megamatcher SDK. Studied economic and
technical feasibility of other biometrics - face identification and iris identification