Shwetank Chauhan — Product Engineer
Deeply passionate about the art and science of semiconductor back-end design, with a strong foundation in STA and Synthesis for advanced-node SoCs. My work revolves around Synthesis, multi-corner timing analysis, and ECO sign-off — diving deep into setup/hold violations, DRVs, Min Pulse Width, noise, and power challenges to achieve robust timing closure at the block level. Always hungry to push boundaries in semiconductor engineering and grow through hands-on challenges. A firm believer in the power of meaningful connections — whether it's exchanging ideas, collaborating on problems, or learning from those who've walked the path before. If you work in the VLSI space, let's talk! 📌 Primetime · Fusion Compiler · Spyglass · TCL · STA · Synthesis · ECO · Advanced Node SoC
Stackforce AI infers this person is a Semiconductor Engineering Specialist focused on VLSI design and physical design methodologies.
Location: Varanasi, Uttar Pradesh, India
Experience: 1 yr 9 mos
Skills
- Cadence Virtuoso
Career Highlights
- Expert in semiconductor back-end design.
- Strong foundation in STA and Synthesis.
- Passionate about solving complex engineering challenges.
Work Experience
Samsung Semiconductor
Associate Staff Engineer (3 mos)
Senior Engineer (1 yr 6 mos)
Assistant Engineer (6 mos)
STMicroelectronics
Project Intern (6 mos)
Education
Master of Technology - MTech at National Institute of Technology Warangal
Bachelor of Technology - BTech at Kamla Nehru Institute of Technology, Sultanpur