Chintan Patel

Software Engineer

Bengaluru, Karnataka, India13 yrs 5 mos experience
Highly Stable

Key Highlights

  • Over 10 years of ASIC Verification experience.
  • Expertise in USB 2.0 and AMBA protocols.
  • Proficient in UVM environment and test case development.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in ASIC design and verification.

Contact

Skills

Core Skills

Asic VerificationFunctional Verification

Other Skills

USB 2.0Device driver enhancementTest case developmentFunctional coverageRegression managementTest plan developmentTest case implementationVerification environment developmentVerilogSystemVerilogASICRTL codingStatic Timing AnalysisCode CoverageSimulations

About

- 10+ years of experience in ASIC Verification. - Experience on USB 2.0, AMBA AHB, APB, AXI, SMMUv3 protocol. - Practical exposure of working in various phases of Verification IP development. - Experience in RTL Functional Verification and Functional & Code Coverage. - Experience in Constrained Driven Verification (CDV) & regression management. - Hands-on expertise of working on Test Plan & Test bench development in UVM environment - Proficient in writing test cases, simulation and debugging. - Experience in building verification environment from scratch using Verilog, SystemVerilog and methodologies like UVM. - Good Understanding of ASIC Design Flow and Design Verification Techniques.

Experience

13 yrs 5 mos
Total Experience
2 yrs 10 mos
Average Tenure
2 yrs 1 mo
Current Experience

Google

Senior Design Verification Engineer

May 2024Present · 2 yrs 1 mo

Qualcomm

Lead Engineer Sr.

Jun 2021May 2024 · 2 yrs 11 mos · Bengaluru, Karnataka, India

Intel corporation

SOC verification engineer

Jan 2018Jun 2021 · 3 yrs 5 mos · Bangalore

Perfectvips

2 roles

ASIC verification engineer

Nov 2013Jan 2018 · 4 yrs 2 mos

  • # Project 1:: IP Verification and Driver enhancement.
  • Enhanced Device driver to verify USB 2.0 controller that used to communicate with Device controller(IP).
  • Enhanced Host XHCI driver to verify USB 2.0 controller that used to communicate with Host Controller.
  • Responsible for running testcases and finding bugs and reporting.
  • Developed and enhanced testcases.
  • Involved in reporting and fixing bug in VIP.
  • Responsible for getting 100% functional and code coverage.
  • Responsible for regression failure fixing and reporting.
  • # Project 2:: VIP verification and Enhancement, testsuite developement.
  • Involved in verification of Protocol Layer and Device framework of USB 2.0.
  • Involved in making of USB2.0 test plan.
  • Involved in development of compliance test suit for USB2.0.
  • Responsible for implementation of new testcases for the scenario recognized.
  • Responsible for running testcases and finding bugs and reporting.
  • Responsible for getting 100% functional coverage.
  • Responsible for regression failure fixing and reporting.
  • # Project 3 - Display Port 1.4 IP Verification:
  • Responsible for implementation of new testcases for the scenario recognized.
  • Responsible for running testcases and finding bugs and reporting.
  • Responsible for regression failure fixing and reporting.
USB 2.0Device driver enhancementTest case developmentFunctional coverageRegression managementASIC Verification+1

Asic verification trainee

May 2013Oct 2013 · 5 mos

  • Project: Development of Verification IP - Lin 2.2
  • Description: The project involves verification of Lin 2.2
  • Roles &Responsibilities:
  •  Responsible for verification environment development from scratch.
  •  Involved in test plan and testcases development.
  •  Involved in development of Master and Slave BFM.
  • Project: Development of Verification IP- AMBA AXI-3
  • Description: The project involves verification of AMBA AXI-3.
  • Roles &Responsibilities:
  •  Responsible for converting Verilog code to SystemVerilog
Verification environment developmentTest plan developmentVerilogSystemVerilogASIC VerificationFunctional Verification

Maven silicon softech pvt. ltd.

intern

Dec 2012Mar 2013 · 3 mos · bangalore

  • Project: Verification of UART IP and SPI Controller
  • Description: The project involves verification of UART IP and SPI Controller.
  • Roles & Responsibilities:
  •  Responsible for verification environment development from scratch
  •  Involved in functional verification via creating testcases using constraint driven verification.
Verification environment developmentFunctional verificationASIC Verification

Maven silicon

Asic verification & design trainee

Jun 2012Nov 2012 · 5 mos

Education

L.D.R.P institute of technology

Bachelor of Engineering (BE) — electronics and communication engineering

Jan 2008Jan 2012

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