Arpit Sharma

Product Engineer

Noida, Uttar Pradesh, India2 yrs 11 mos experience
Most Likely To Switch

Key Highlights

  • Expert in power analysis for semiconductor designs.
  • Hands-on experience with leading companies in silicon design.
  • Strong foundation in VLSI design from a prestigious institution.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in power analysis and RTL synthesis.

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Skills

Core Skills

Power AnalysisRtl Lint & Cdc

Other Skills

PTPXSynthesis STADSP ( CORE IP)Unified Power Format (UPF)VerilogDigital Circuit Design

Experience

2 yrs 11 mos
Total Experience
1 yr 5 mos
Average Tenure
1 yr 11 mos
Current Experience

Qualcomm

Power design engineer

Jul 2024Present · 1 yr 11 mos · Noida, Uttar Pradesh, India · On-site

  • Dynamic and Leakage power analysis for DSP IP Cores using Prime Power ( PTPX) at different implementation stages of design for low power sign off .
  • Highlighting the issue related to dynamic and leakage power mismatch compared to target and working with synth and PD teams to fix the issue.
  • Power Intent validation at different stages of design implementation ( Synthesis & Physical design) using CLP
PTPXPower Analysis

Amd

3 roles

Design Engineer 2

Jul 2023Jul 2024 · 1 yr · Hyderabad, Telangana, India

  • Worked on RTL LINT/ CDC Synthesis Front-end activities for Instinct MI350X GPU Multi -Chiplet Accelerator SOC.

Co Op intern

Jul 2022Jun 2023 · 11 mos · Hyderabad, Telangana, India

  • Worked on RTL LINT / CDC Synthesis Front-end activities for Instinct MI350X GPU Multi-Chiplet Accelerator SOC.
RTL LINT & CDCSynthesis STA

Co Op intern

Jul 2022Jun 2023 · 11 mos · Hyderabad, Telangana, India

Education

National Institute of Technology Kurukshetra

M-tech — VLSI design

Jan 2021Jan 2023

SHRI RAMSWAROOP MEMORIAL COLLEGE OF ENGINEERING AND MANAGEMENT, LUCKNOW

B-tech electronic & communication

Jan 2016Jan 2020

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