Rahul Ranjan Kumar — CEO
VLSI Design and Verification enthusiast with a strong background in Verilog, UVM, System Verilog, and System Verilog Assertions. Experienced in Functional as well as formal Verification. Masters in VLSI from NIT, Surat. Completed 1-year internship at INTEL, Bengaluru. Strong knowledge in Digital Circuits, Digital VLSI Design, Image processing architectures, and VLSI system design. Worked in various academic projects using the FPGA development tool and FPGA boards. Effective collaborator, fast learner & ability to work individually and as a part of a team.
Stackforce AI infers this person is a VLSI Design and Verification specialist with a focus on digital circuit design.
Location: Bengaluru, Karnataka, India
Experience: 5 yrs 2 mos
Career Highlights
- Expert in VLSI Design and Verification methodologies.
- Strong background in Verilog and System Verilog.
- Proven experience in functional and formal verification.
Work Experience
Cadence
Lead Design Engineer (1 yr)
Intel Corporation
Analog & Mixed Signal Verification Engineer (3 yrs 3 mos)
Xilinx
Design Verification Engineer (11 mos)
Intel Corporation
System-on-Chip Verification Engineer (11 mos)
Bharat Sanchar Nigam Limited
Summer Intern (0 mo)
Education
Master of Technology - MTech at Sardar Vallabhbhai National Institute of Technology, Surat
Bachelor of Engineering at Rajiv Gandhi Prodyogiki Vishwavidyalaya