Jonathan Sureshbabu

Software Engineer

Bengaluru, Karnataka, India6 yrs 4 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in low-power SoC architecture and design automation.
  • Proficient in model-based systems engineering and early PPA optimization.
  • Strong background in CI/CD automation for hardware development.
Stackforce AI infers this person is a Low-Power SoC Architect with expertise in Design Automation and Systems Engineering.

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Skills

Core Skills

Model-based Systems Engineering (mbse)Low-power Soc ArchitectureDesign Automation & Ci/cd

Other Skills

SimulinkPython (Programming Language)JenkinsLow-power DesignEDASysML v2SysMLhardware modellingPyTorchDeep LearningField-Programmable Gate Arrays (FPGA)Data ScienceComputer ArchitectureREST APIsC++

About

I’m a Staff Engineer at Infineon Technologies who bridges hardware and software to deliver high‑impact systems solutions. My focus: low‑power SoC architecture, system modelling, and design automation that improves design quality and accelerates development cycles. I partner closely with Design and Concept Engineers—building tools, models, and flows that make better decisions earlier. Across the full design lifecycle—from micro‑architecture to early power/performance analysis (PPA) and verification—I create executable models and prototypes to de‑risk architecture, expose bottlenecks, and guide PPA trade‑offs before RTL solidifies. I lean on Synopsys Platform Architect, MATLAB/Simulink, and System Composer for modelling, and UPF/UVM with Verilog/System Verilog to align system intent with implementation and verification. On the automation side, I use Python/TCL plus Jenkins, Docker, and SonarQube to build CI/CD for hardware: reproducible flows, automated checks/regressions, and dashboards that surface power, performance, and quality signals early. I’m passionate about turning data into decisions with Tableau and LabVIEW, and about enabling teams through reusable frameworks, documentation, and mentoring. What motivates me is measurable impact—earlier PPA visibility, faster bring‑up, cleaner handoffs, and reduced integration risk—by combining modelling, low‑power architecture, and robust automation. Specialties: Low‑Power SoC Architecture (UPF) • Systems Modeling & Virtual Prototyping • Early PPA Optimization • Verification Enablement (UVM) • Design Automation & CI/CD (Python, Shell, TCL; Jenkins, Docker, SonarQube) • EDA: Synopsys Platform Architect, Cadence Stratus/Cerebrus • Modeling: MATLAB/Simulink, System Composer • Data & Visualization: Tableau, LabVIEW • RTL: Verilog/System Verilog If you’re working on low‑power SoCs, architecture exploration, modelling/VP, UPF/UVM flows, or design automation, I’d love to connect and exchange ideas. Open to collaborations and roles where systems engineering, automation, and early PPA drive product outcomes.

Experience

6 yrs 4 mos
Total Experience
3 yrs 2 mos
Average Tenure
5 yrs 8 mos
Current Experience

Infineon technologies

3 roles

Staff Engineer

Apr 2023Present · 3 yrs 2 mos

SimulinkModel-based Systems Engineering (MBSE)Low-Power SoC Architecture

Senior Engineer

Promoted

Oct 2021Apr 2023 · 1 yr 6 mos

Python (Programming Language)JenkinsDesign Automation & CI/CDLow-Power SoC Architecture

Specialist - Software & Firmware

Oct 2020Nov 2021 · 1 yr 1 mo

Pgs rwth aachen

Research Assistant

Sep 2018May 2019 · 8 mos · Aachen, North Rhine-Westphalia, Germany

  • Implement improvements on an existing High voltage test bench designed to test power semiconductor devices.
  • Generating BOMs and Procurement of components and PCB which were designed in house.

Mitsubishi electric r&d centre europe (merce-uk)

Research Intern

Oct 2016Apr 2017 · 6 mos · Rennes, Brittany, France

  • Designing test benches and Implementing experimentation protocols to test robustness of power semiconductor devices under short circuit conditions.
  • Involved in designing and improvements of existing test bench, PCBs and procurement of components and instruments.
  • Result analysis of the experimental data and affirmation with Literature study.

Amazon development centre (india) private limited

Quality Analyst

Nov 2014Jul 2015 · 8 mos · Chennai, Tamil Nadu, India

  • Part of the Selection Monitoring team.

Education

RWTH Aachen University

Master of Science - MS — Electrical Power engineering

Jan 2015Jan 2020

Anna University Chennai

Bachelor of Engineering - BE — Electrical and Electronics Engineering

Jan 2010Jan 2014

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