Jan 2015 – Present · 11 yrs 5 mos

• Edge AI, Computer Graphics, 3D Graphics processor design, OpenGLES,

Jan 2014 – Dec 2014 · 11 mos

• Managed small dedicated team of design engineers for low power wireless (802.11) MAC IP development for IoT applications.

Aug 2012 – Dec 2013 · 1 yr 4 mos

• Cache design for shared memory bus bandwidth optimization for multicore SoC.
• Network buffer management system design for data traffic on multicore DSP SoC.

Aug 2008 – Oct 2012 · 4 yrs 2 mos

• Leading IP development for Set Top Box display applications. Expertise in design, verification, synthesis, timing closure and formal verification.

Apr 2007 – Jul 2008 · 1 yr 3 mos

• Involved in RTL Design of digital logic, RTL and gates Verification,
• Good exposure to semiconductor VLSI design flows and automation.
• Synthesis, Timing Closure and activity management.
• Design domain: Digital Video Technology

Mar 2004 – Mar 2007 · 3 yrs