Sep 2024 – Jan 2025 · 4 mos · Intel - Santa Clara, California, United States · On-site

• Client: Intel
• Working in Validation of Electrical Components of processors of Intel x86 chipsets for power and thermal stability, monitoring performance under various workloads and ensuring compliance with thermal limits.
• Conducted Signal Margin tests for high-speed data paths, proficient in utilizing oscilloscopes to inspect eye diagrams and assess signal integrity of high-speed IO and SERDES characterization.
• Verified fuse settings and conducted FIVR stability checks, ensuring accurate voltage regulation across the processor cores.
• Validated stability and bandwidth consistency on HSIO components like PCIe interfaces, critical for high-speed interconnect performance and data integrity using python scripts.
• Developed python enabled platform to measuring jitter, rise/fall times, and signal quality to ensure compliance with technical specifications using JBERT equipment.
• Utilized JMP software for in-depth performance analysis, identifying trends and optimization opportunities within multi-core workloads.

Aug 2020 – Sep 2023 · 3 yrs 1 mo · On-site

• Worked on ensuring the reliability and performance of Intel's server hardware components where expertise in virtualization, IO validation with DMA remapping features, PCIe protocols, and the validation of TDX security features of Intel chips.
• In the realm of virtualization, validation on ensuring that server hardware integrated with virtualization technologies, involved comprehensive testing to assess CPUs, memory, and I/O devices, platforms like VMware and Hyper-V. Validation of PCIe with high-speed data interconnect within a server for data transfers, latency minimisation , and data integrity along with efficient virtual machine creation and management, optimizing server resource utilization while maintaining stability and performance.
• Also worked on TDX which is paramount focus, particularly in the context of Input/Output (IO) validation with DMA remapping features. DMA enables hardware components like network adapters and storage controllers to access system memory directly. However, this presents security risks. To mitigate risks, Intel's server hardware incorporated remapping technology, and my role was to rigorously test and validate its effectiveness. I ensured that DMA remapping worked seamlessly, safeguarding the confidentiality and integrity of system memory and bolstering security against potential threats.
• In addition to these domains, my role required close collaboration with cross-functional teams. Working in concurrency with hardware designers, software engineers, and product managers was essential to identify and resolve hardware-related issues promptly.
• Efficiency was a key focus, and I contributed to this by developing and implementing automated test scripts and tools. Automation not only accelerated the validation process for reliable results.

Jul 2019 – Jul 2020 · 1 yr · On-site

• During course of internship I have worked in software development, particularly with Intel's Xeon hardware. My experience includes contributing to the development of new features for Xeon processors and working on Intel's virtual machine, ACRN. I've had the opportunity to focus on Software as a Service (SAAS) solutions and have also been involved in planning for Platform as a Service (PAAS) and Infrastructure as a Service (IAAS) projects. My work reflects a commitment to innovation in cloud computing and server technology.