N

Navneeth Talasu

Software Engineer

Bengaluru, Karnataka, India9 yrs 9 mos experience
Highly Stable

Key Highlights

  • Experienced in GPU RTL design and SoC integration.
  • Proficient in low power design methodologies.
  • Strong background in CAD engineering and design automation.
Stackforce AI infers this person is a skilled RTL Design Engineer with expertise in SoC and GPU technologies.

Contact

LinkedIn

Skills

Core Skills

Rtl DesignSoc DesignCad Engineering

Other Skills

GPU IPRTL-UPFPCIE subsystemLow power sanity checksFEVIP integrationDesign AutomationTools TestingMicrosoft ExcelMicrosoft WordCMicrosoft OfficeMatlabPowerPoint

Experience

9 yrs 9 mos
Total Experience
6 yrs 8 mos
Average Tenure
3 yrs 1 mo
Current Experience

Qualcomm

GPU RTL Design Engineer

May 2023 – Present · 3 yrs 1 mo · Greater Bengaluru Area · On-site

  • Working in GPU IP.
GPU IPRTL Design

Intel corporation

2 roles

SoC Design Engineer

Promoted

Sep 2017 – Apr 2023 · 5 yrs 7 mos

  • Working in RTL-UPF, Integrating the IP's UPF in RTL stage, RTL integration in PCIE subsystem.
  • Low power sanity checks at partition and SoC level.
  • Worked on FEV between hierarchical and merged UPF.
RTL-UPFPCIE subsystemLow power sanity checksFEVIP integrationSoC Design

CAD Engineer

Jul 2016 – Aug 2017 · 1 yr 1 mo

  • Design Automation, Tools Testing
Design AutomationTools TestingCAD Engineering

Education

Indian Institute of Technology, Bombay

Master's Degree — electronic systems

Jan 2014 – Jan 2016

Vellore Institute of Technology

Bachelor's Degree — Electronics and Communications Engineering

Jan 2009 – Jan 2013

sfs palasa

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