J

Juergen Froessl

Director of Engineering

Sunnyvale, California, United States29 yrs 4 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Over 15 years in Electronic Design Automation.
  • Leader in developing industry-leading EDA tools.
  • PhD in Formal Hardware Verification and Model Checking.
Stackforce AI infers this person is a leader in Electronic Design Automation with extensive experience in software development and team management.

Contact

Skills

Core Skills

Electronic Design Automation (eda)Software DevelopmentManagement Of International TeamsTeam Building

Other Skills

Customer OrientedTechnical PresentationsBuilding R&D teamFormal VerificationSystem on Chip (SoC)Public SpeakingExecutive ManagementSemiconductor IndustryIntegrated Circuit DesignLow-power DesignLogic SynthesisVerilogStatic Timing AnalysisDebuggingASIC

About

I have more than 15 years of experience in the field of Electronic Design Automation (EDA) and development of very large Software CAD Systems. I'm currently in a Senior R&D Director position at Synopsys, leading international teams of software engineers, developing Synthesis and Place&Route tools. I'm an experienced, respected leader of large, high caliber software development teams which are internationally distributed. I'm used to deliver on aggressive goals under tight budget and schedule control. I'm working with Synopsys' key customers on a daily basis to help them with their toughest problems, taping out cutting edge designs like Micro-Processors (CPU), Graphic Processors (GPU) and System on Chip Designs (SoC). Customers include all leading semiconductor companies and fabs worldwide. I'm representing Synopsys at technical conferences and in customer meetings, communicating roadmaps, technical issues and company positions. I am a key contributor to industry leading EDA tools known as ECO Compiler, Design Compiler and IC Compiler. I am a leading member of the R&D team which developed the IC Compiler Place&Route product from scratch. IC Compiler is owning a majority of the P&R market today. I have extensive technical expertise in the areas of Low Power Design (UPF), Engineering Change Order (ECO), Synthesis and Optimization, Place&Route, Formal Hardware Verification, Design Database and Hierarchical Design Implementation. I'm holding a PhD in Computer Science and a Masters in Electrical Engineering, both from the University of Karlsruhe in Germany. I received my PhD for my research in the field of Formal Hardware Verification and Model Checking, while I was working at the University of Karlsruhe as a research assistant. I have published and presented my work at international conferences and journals.

Experience

29 yrs 4 mos
Total Experience
14 yrs 8 mos
Average Tenure
23 yrs 4 mos
Current Experience

Synopsys

3 roles

Group Director R&D

Promoted

Jan 2009Present · 17 yrs 5 mos

Electronic Design Automation (EDA)Software DevelopmentManagement Of International TeamsCustomer OrientedTechnical Presentations

Director R&D

Promoted

Apr 2005Oct 2010 · 5 yrs 6 mos

  • Managing large scale software development of IC design CAD software.
Software DevelopmentManagement Of International Teams

Senior R&D Manager

Feb 2001Apr 2003 · 2 yrs 2 mos

  • Building R&D team in the Synopsys German Location
Building R&D teamTeam Building

University karlsruhe

Research Assistant

Jan 1990Jan 1996 · 6 yrs

Education

Karlsruhe Institute of Technology (KIT)

Doctor of Philosophy (PhD) — Computer Science

Jan 1990Jan 1996

Karlsruhe Institute of Technology (KIT)

Master's degree — Electical Engineering

Jan 1984Jan 1990

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